發(fā)布時(shí)間：2018-01-28 09:04

  本文關(guān)鍵詞： NAND Flash AXI DMA Zynq FTL 千兆以太網(wǎng)　出處：《哈爾濱工業(yè)大學(xué)》2014年碩士論文　論文類型：學(xué)位論文

【摘要】：NAND Flash存儲器因具有速度快、體積小、存儲容量大、抗振動性能強(qiáng)等優(yōu)點(diǎn)得到了大范圍應(yīng)用。但由于NAND Flash具有不能連續(xù)尋址、先擦后寫和存在壞塊等缺陷，使得已有的磁盤管理方法不再適用于NAND Flash存儲器，廣大研究者一直致力于尋求能快速解決NAND Flash存儲問題的方法。目前NAND Flash管理算法評估還沒有統(tǒng)一的驗(yàn)證平臺，亟需設(shè)計(jì)一款簡單通用的平臺對管理算法進(jìn)行直觀評估。本文深入分析NAND Flash操作特性和管理算法的研究方向后，基于Xilinx公司全可編程的Zynq-7000Soc研制了一款軟、硬件結(jié)合的NAND Flash管理算法驗(yàn)證平臺。 在硬件方面，利用Zynq內(nèi)嵌的PL（Programmable Logic，，PL）實(shí)現(xiàn)了NAND Flash控制器、數(shù)據(jù)傳輸主控模塊，數(shù)據(jù)錯誤引入模塊和壞塊管理模塊等。其中，NAND Flash控制器采用雙乒乓緩存以提升數(shù)據(jù)寫入速度；數(shù)據(jù)傳輸主控模塊一方面采用AXI GP接口實(shí)現(xiàn)了PS（Processing System，PS）應(yīng)用程序?qū)ζ涞目刂乒δ�，另一方面采用AXI HP接口實(shí)現(xiàn)了AXI DMA以完成PS和PL間的高速數(shù)據(jù)傳輸；數(shù)據(jù)錯誤引入模塊通過AXI GP接口獲取PS給出的錯誤位置，并能在NAND Flash頁編程時(shí)實(shí)現(xiàn)相應(yīng)的位翻轉(zhuǎn)功能；壞塊管理模塊除實(shí)現(xiàn)正常讀、寫、擦除失敗產(chǎn)生的壞塊標(biāo)記和重映射外，還利用Xilinx的HLS工具實(shí)現(xiàn)了BCH糾錯算法來發(fā)現(xiàn)數(shù)據(jù)出錯的壞塊并標(biāo)記與重映射。 在PS設(shè)計(jì)方面，通過移植實(shí)時(shí)系統(tǒng)FreeRTOS對應(yīng)用程序進(jìn)行管理，并利用Zynq內(nèi)嵌的USB控制器實(shí)現(xiàn)了USB大容量存儲協(xié)議以將多種文件系統(tǒng)引入驗(yàn)證平臺，同時(shí)通過移植LwIP TCP/IP協(xié)議棧實(shí)現(xiàn)了千兆以太網(wǎng)的傳輸，完成算法性能分析時(shí)必要數(shù)據(jù)的快速上傳。最后，本文利用PS實(shí)現(xiàn)了經(jīng)典的頁映射算法、FAST等FTL算法以作為其它FTL算法的參考基準(zhǔn)，并可為驗(yàn)證數(shù)據(jù)壓縮等高級算法提供運(yùn)行環(huán)境。此外，為彌補(bǔ)商業(yè)軟件的不足，設(shè)計(jì)了測試軟件對NAND Flash管理算法的常用指標(biāo)進(jìn)行評估。 系統(tǒng)測試表明，研制的NAND Flash算法驗(yàn)證平臺能夠?qū)崿F(xiàn)對NANDFlash管理算法的有效驗(yàn)證，并可給出直觀的評估結(jié)果，滿足設(shè)計(jì)要求。
[Abstract]:NAND Flash memory has been widely used because of its advantages of high speed, small volume, large storage capacity and strong anti-vibration performance. However, NAND Flash can not be continuously addressed. The existing disk management methods are no longer suitable for NAND Flash memory due to the defects such as erasing and writing after writing and the existence of bad blocks. Many researchers have been trying to find a way to solve the NAND Flash storage problem quickly. At present, there is no unified verification platform for the evaluation of NAND Flash management algorithm. It is urgent to design a simple and universal platform to evaluate the management algorithm directly. This paper deeply analyzes the operating characteristics of NAND Flash and the research direction of management algorithm. Based on Zynq-7000Soc of Xilinx Company, a software and hardware NAND Flash management algorithm verification platform is developed. In the aspect of hardware, the NAND Flash controller and the main control module of data transmission are realized by using the PL(Programmable logic device embedded in Zynq. The data error introduction module and the bad block management module, etc., in which the nand Flash controller adopts double ping-pong buffer to improve the data writing speed; On the one hand, the main control module of data transmission uses AXI GP interface to realize the control function of PS(Processing system PS-based application program. On the other hand, AXI DMA is implemented by AXI HP interface to complete the high-speed data transmission between PS and PL. The data error introduction module obtains the error position given by PS through the AXI GP interface, and can realize the corresponding bit flipping function when programming on the NAND Flash page. The bad block management module implements normal reading, writing, and erasing bad block tags and remapping due to failure. The BCH error correction algorithm is implemented by using Xilinx's HLS tool to detect bad blocks of data errors and to mark and remap. In the aspect of PS design, the application program is managed by transplanting the real-time system FreeRTOS. And the USB controller embedded in Zynq is used to implement the USB mass storage protocol to introduce a variety of file systems into the verification platform. At the same time, the transmission of Gigabit Ethernet is realized by transplanting the LwIP TCP/IP protocol stack, and the necessary data is uploaded quickly when the algorithm performance analysis is completed. Finally. In this paper, we use PS to implement the classical FTL algorithm, such as fast, which can be used as a reference reference for other FTL algorithms, and provide a running environment for the verification of advanced algorithms such as data compression. In order to make up for the shortage of commercial software, the test software is designed to evaluate the common indexes of NAND Flash management algorithm. The system test shows that the developed NAND. The Flash algorithm verification platform can effectively verify the NANDFlash management algorithm, and can give the intuitive evaluation results to meet the design requirements.
【學(xué)位授予單位】：哈爾濱工業(yè)大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2014
【分類號】：TP333

【參考文獻(xiàn)】

相關(guān)博士學(xué)位論文 前2條

1 胡洋;高性能固態(tài)盤的多級并行性及算法研究[D];華中科技大學(xué);2012年

2 丁祥武;列存儲系統(tǒng)的若干關(guān)鍵技術(shù)研究[D];東華大學(xué);2013年

本文編號：1470334