本文關鍵詞： SIMD 向量轉置單元 PowerPC　出處：《西安電子科技大學》2016年碩士論文　論文類型：學位論文

【摘要】：為了追求更高的數據處理能力,處理器操作數的精度在不斷提高,而實際上很多運算操作并不需要處理如此高精度的數據,這樣的操作方式沒有充分發(fā)揮數據處理資源的全部潛力,造成資源的浪費,因而提出了基于單指令多數據流(SIMD)的子字并行優(yōu)化策略。然而SIMD寄存器是以字對齊方式為訪問形式的存儲單元,實際存儲器以字節(jié)對齊進行訪存,因此在并行操作前后需要一個額外的數據轉置單元(Permute)對數據進行轉置處理,得到符合SIMD寄存器規(guī)格的操作數。為實現(xiàn)單指令多數據流SIMD并行處理機制中的數據轉置功能,本文研究了基于Power PC的體系架構與AltiVec機制(Power PC體系架構通用處理器的多媒體指令集的擴展)的向量ALU數據轉置單元,通過對Power PC體系架構與該處理器指令集的分析,設計實現(xiàn)了SIMD向量并行數據處理技術中負責數據處理的向量轉置(Permute)模塊。本設計模塊處理128位的操作數,采用兩級流水線,設計實現(xiàn)了Power PC_ISA指令集數據轉置模塊中包括向量打包指令、向量解包指令、向量合并指令、向量復制拼接指令、向量選擇指令、向量置換指令、向量移位指令和向量聚集指令共八類53條向量轉置指令的操作,該轉置模塊解決了SIMD向量寄存器與實際數據訪存操作之間因數據格式不一致而導致并行操作技術對性能優(yōu)化程度不高的問題。設計電路使用Verilog硬件描述語言完成電路描述,實現(xiàn)電路功能,最后對完成的設計電路進行功能仿真,保證其功能的正確性。本設計在第二級的流水線中引入了交叉開關矩陣(Crossbar Switch)結構完成了數據處理后的數據選擇操作,該交叉開關矩陣模塊完成了轉置模塊所有指令的數據選擇操作,無阻塞的內部結構保證數據傳輸速度,根據分析指令之間的操作相似之處,實現(xiàn)指令間的模塊共用,精簡了電路結構,消除冗余電路,優(yōu)化模塊面積,提高處理速度。
[Abstract]:In order to achieve higher data processing power, the processor Operand accuracy is constantly improving, but in fact, many operations do not need to deal with such high precision data. This mode of operation does not give full play to the full potential of data processing resources, resulting in a waste of resources. Therefore, a sub-word parallel optimization strategy based on single-instruction multi-data stream (SIMD) is proposed. However, the SIMD register is a memory cell which is accessed by word alignment. The actual memory accesses memory in byte alignment, so an additional data transpose unit (Permute) is required before and after parallel operations. In order to realize the data transpose function in the SIMD parallel processing mechanism of single instruction and multiple data flow, the operands that accord with the SIMD register specification are obtained. This paper studies the extension of multimedia instruction set based on Power PC architecture and AltiVec mechanism. The vector ALU data transpose unit of. By analyzing the Power PC architecture and the instruction set of the processor. The design and implementation of the SIMD vector parallel data processing technology of the vector transpose data processing module, this design module processing 128-bit operands, using two-stage pipeline. The data transpose module of Power PC_ISA instruction set includes vector package instruction, vector unpack instruction, vector merge instruction, vector copy splicing instruction and vector selection instruction. Vector permutation instruction, vector shift instruction and vector aggregation instruction are eight kinds of 53 vector transpose instructions. The transposing module solves the problem that the data format is not consistent between the SIMD vector register and the actual data access operation, which leads to the low performance optimization of the parallel operation technology. The circuit uses Verilo to design the circuit. G hardware description language completes the circuit description. The function of the circuit is realized. Finally, the functional simulation of the designed circuit is carried out. To ensure the correctness of its function. This design introduces the cross switch matrix crossbar switch structure in the second stage of pipeline to complete the data selection operation after data processing. The cross-switch matrix module completes the data selection operation of all instructions of the transpose module, and the non-blocking internal structure guarantees the data transmission speed. It realizes the module sharing among instructions, simplifies the circuit structure, eliminates the redundant circuit, optimizes the module area and improves the processing speed.
【學位授予單位】：西安電子科技大學
【學位級別】：碩士
【學位授予年份】：2016
【分類號】：TP332

【參考文獻】

相關期刊論文 前3條

1 鄧豹;劉照青;;基于AltiVec技術的PowerPC處理器矢量運算性能測試[J];計算機測量與控制;2015年06期

2 席筱穎;;集成電路功能驗證方法[J];科技傳播;2010年23期

3 解詠梅,張珩,張福新;基于覆蓋率的功能驗證方法[J];計算機應用研究;2005年01期

，

本文編號：1469898