本文關(guān)鍵詞：基于手機(jī)基帶芯片的LPDDR2 SDRAM控制器的設(shè)計(jì)與驗(yàn)證　出處：《西安電子科技大學(xué)》2013年碩士論文　論文類型：學(xué)位論文

  更多相關(guān)文章： LPDDR2SDRAM JEDEC 控制器 驗(yàn)證

【摘要】：近年來，隨著科學(xué)技術(shù)的進(jìn)步和人們?cè)谏虅?wù)、娛樂活動(dòng)中對(duì)便攜性需求的持續(xù)增長(zhǎng)，消費(fèi)類和商務(wù)類電子設(shè)備不斷朝著移動(dòng)化和便攜式的方向發(fā)展。智能手機(jī)作為移動(dòng)終端的代表性產(chǎn)品，在日常生活中有著重要地位。智能手機(jī)電池使用時(shí)間的最大化是系統(tǒng)設(shè)計(jì)的主要目標(biāo)，同時(shí)，體積小、外形靈巧也是所要追求的目標(biāo)。而存儲(chǔ)器作為智能手機(jī)中的重要組件，它的功耗的降低和體積的減小也越來越被人們所重視，低功耗和高存儲(chǔ)密度成為智能手機(jī)對(duì)內(nèi)存的兩個(gè)關(guān)鍵性要求。 本文首先在深入研究了JEDEC發(fā)布的LPDDR2SDRAM標(biāo)準(zhǔn)的基礎(chǔ)上，介紹了一款基于手機(jī)基帶芯片的LPDDR2SDRAM控制器的總體架構(gòu)和功能。然后從低功耗控制的角度出發(fā)，詳細(xì)闡述了存儲(chǔ)器時(shí)鐘轉(zhuǎn)換、進(jìn)入/離開standby狀態(tài)、復(fù)位控制、shutdown控制等功能的設(shè)計(jì)與實(shí)現(xiàn)。時(shí)鐘轉(zhuǎn)換功能可以切換三種不同頻率的時(shí)鐘，既滿足了不同操作對(duì)于不同時(shí)鐘頻率的要求，又節(jié)省了功耗。而其他功能的設(shè)計(jì)保證了LPDDR2SDRAM控制器的正常運(yùn)行，確保了LPDDR2SDRAM中數(shù)據(jù)的安全性的同時(shí)降低了功耗。此款LPDDR2SDRAM控制器滿足了智能手機(jī)對(duì)于低功耗的需求，有一定的應(yīng)用價(jià)值。 論文介紹了關(guān)于LPDDR2SDRAM控制器的系統(tǒng)級(jí)功能驗(yàn)證方法，根據(jù)控制器的特點(diǎn)，采用了軟硬件協(xié)同的系統(tǒng)級(jí)驗(yàn)證方法，基于項(xiàng)目設(shè)計(jì)規(guī)范定義了驗(yàn)證功能點(diǎn)，，然后根據(jù)實(shí)際應(yīng)用情況，搭建了包含LPDDR2SDRAM模型的驗(yàn)證平臺(tái)。采用定向激勵(lì)驗(yàn)證的方法，對(duì)各個(gè)功能驗(yàn)證點(diǎn)進(jìn)行了驗(yàn)證，最終達(dá)到對(duì)所有功能點(diǎn)的驗(yàn)證。
[Abstract]:In recent years, with the progress of science and technology and people in business, entertainment activities in the portable demand for continued growth. Consumer and business electronic devices continue to move towards the direction of mobility and portable. Smartphone as the representative product of mobile terminals. The maximization of battery life of smart phone is the main goal of system design, and it is small in size. Smart appearance is also the goal to pursue, and memory as an important component of smart phones, its power consumption and volume reduction has been paid more and more attention. Low power consumption and high storage density are the two key requirements for memory in smart phones. In this paper, the first in-depth study of the LPDDR2SDRAM standard released by JEDEC on the basis of. This paper introduces the architecture and function of a LPDDR2SDRAM controller based on mobile phone baseband chip. Then from the point of view of low power consumption control, the memory clock conversion is described in detail. The design and implementation of the functions of entering / leaving standby state, reset control and shutdown control, etc. The clock switching function can switch three different frequency clocks. It not only meets the requirements of different operation for different clock frequency, but also saves power consumption, while the design of other functions ensures the normal operation of the LPDDR2SDRAM controller. Ensures the security of the data in the LPDDR2SDRAM while reducing the power consumption. This LPDDR2SDRAM controller meets the low power requirements of the smartphone. It has certain application value. The system level verification method of LPDDR2SDRAM controller is introduced in this paper. According to the characteristics of the controller, the system level verification method based on hardware and software cooperation is adopted. The verification function point is defined based on the project design specification, and then, according to the actual application, a verification platform including LPDDR2SDRAM model is built, and the method of directional excitation verification is adopted. Each function verification point is verified, and finally all function points are verified.
【學(xué)位授予單位】：西安電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2013
【分類號(hào)】：TP332;TN402

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本文編號(hào)：1412278