天堂国产午夜亚洲专区-少妇人妻综合久久蜜臀-国产成人户外露出视频在线-国产91传媒一区二区三区

當前位置:主頁 > 科技論文 > 計算機論文 >

基于FPGA的雷達回波采集存儲系統(tǒng)設計

發(fā)布時間:2018-01-11 21:09

  本文關鍵詞:基于FPGA的雷達回波采集存儲系統(tǒng)設計 出處:《中北大學》2017年碩士論文 論文類型:學位論文


  更多相關文章: 雷達回波 采集存儲 LVDS 信號完整性


【摘要】:雷達回波數(shù)據(jù)對現(xiàn)代雷達的研制工作有重要意義,同時對回波數(shù)據(jù)的分析是雷達應用的基礎。本文結合實驗室課題的具體指標要求,針對應用于彈載、機載、船載等特殊領域下的雷達,設計了基于FPGA的雷達回波采集存儲設備對其雷達回波數(shù)據(jù)進行實時高速采集、抗干擾傳輸與可靠存儲,供事后對數(shù)據(jù)回讀并做相應分析。在對被采集信號進行分析、建模、仿真的基礎之上,并結合具體指標要求。采用將采編單元與存儲單元分離,兩者之間通過LVDS信號形式進行傳輸?shù)目傮w方案。采編單元上電啟動后開始工作,將經(jīng)AD采集轉換處理后的數(shù)字量送至存儲單元,存儲單元在接收到啟動信號之后對數(shù)據(jù)進行接收并存儲。存儲方式采用FIFO緩存、FLASH存儲陣列與并行流水線操作方式。分別使用ISE14.7與Cadence16.5對系統(tǒng)的軟硬件模塊進行設計與實現(xiàn),包括有AD模塊、接口轉化、FPGA控制、存儲模塊、電源模塊、讀數(shù)模塊、上位機等部分。對可能影響系統(tǒng)可靠性的各類因素進行了分析,并將這些分析結果與思想貫穿整個系統(tǒng)設計過程。主要選擇對系統(tǒng)可靠性影響最大的兩類因素進行分析:1指標規(guī)定了存儲單元的外殼體的尺寸,進而限制實際放置PCB板的空間大小。選取PCB板中的幾組關鍵信號進行反射與串擾的仿真,在仿真基礎上做出規(guī)則限制,按照限制后的規(guī)則進行布局布線,并得出系統(tǒng)在當前頻率條件下,信號質量良好,無明顯失真現(xiàn)象;2對機械結構進行合理的設計,采用兩層殼體與二級殼體灌封的方式對電路板進行保護,對機械材料的選擇與工藝處理進行了介紹。通過分析最大程度的保證設備的穩(wěn)定性與可靠性。最后對系統(tǒng)進行了功能仿真與性能驗證,結果表明:本文設計的雷達回波采集存儲設備可以穩(wěn)定可靠的采集記錄數(shù)據(jù),達到了采樣速率10Msps、精度14位、存儲容量64GB的技術指標,并具有采集與存儲分離、抗振動抗沖擊、高可靠性的特點。
[Abstract]:Radar echo data is of great significance to the development of modern radar, and the analysis of echo data is the basis of radar application. Under the special field of shipborne radar, the radar echo acquisition and storage equipment based on FPGA is designed to collect the radar echo data in real time and high speed, anti-jamming transmission and reliable storage. On the basis of analyzing, modeling and simulation of the collected signals, and combining with the specific index requirements, the collection and compilation unit and the memory unit are separated. Between the two through the LVDS signal transmission of the overall scheme. The acquisition unit on the start of the start of work, the AD acquisition and conversion of the digital data to the memory unit. The storage unit receives and stores the data after receiving the start signal. The storage mode is FIFO cache. FLASH memory array and parallel pipeline operation mode. ISE14.7 and Cadence16.5 are used to design and implement the software and hardware modules of the system, including AD module. Interface conversion FPGA control, storage module, power module, reading module, host computer and other parts. The various factors that may affect the reliability of the system are analyzed. These analysis results and ideas run through the whole system design process. Two kinds of factors that have the greatest impact on the system reliability are selected to analyze the size of the housing of the storage cell. Then the space size of the actual PCB board is limited. Several key signals in the PCB board are selected to simulate the reflection and crosstalk, and the rules are made on the basis of the simulation. According to the restricted rules, the layout and routing are carried out, and it is concluded that under the current frequency condition, the signal quality is good and there is no obvious distortion. (2) reasonable design of mechanical structure, using two-layer shell and two-layer shell to protect the circuit board. The selection and processing of mechanical materials are introduced. The stability and reliability of the equipment are guaranteed by analyzing the maximum degree. Finally, the function simulation and performance verification of the system are carried out. The results show that the radar echo acquisition and storage device designed in this paper can collect and record data stably and reliably, and achieve the technical target of sampling rate of 10 Msps, accuracy of 14 bits and storage capacity of 64 GB. And has the collection and the storage separation, the vibration resists the shock, the high reliability characteristic.
【學位授予單位】:中北大學
【學位級別】:碩士
【學位授予年份】:2017
【分類號】:TN957.51;TP333

【參考文獻】

相關期刊論文 前10條

1 馬其琪;徐曉輝;孔雁凱;郭濤;;彈載記錄器的抗高過載分析及設計[J];彈箭與制導學報;2015年01期

2 任敏;張艷兵;王歡;靳書云;;基于硬件控制的雙通道機載雷達數(shù)據(jù)記錄儀[J];探測與控制學報;2014年03期

3 翟瑋;;機載電子設備環(huán)境適應性設計[J];電子機械工程;2012年05期

4 曲利新;;空間電子設備電路板可靠性可測試性設計檢查[J];現(xiàn)代電子技術;2011年19期

5 晁盛遠;;印制電路板的可靠性設計[J];電力電子;2009年04期

6 王連坡;茅文深;;電磁屏蔽技術在結構設計中的應用[J];艦船電子工程;2009年01期

7 張燕;焦新泉;熊繼軍;;超大容量高速存儲技術研究[J];微計算機信息;2008年05期

8 童鵬;胡以華;;FPGA器件選型研究[J];現(xiàn)代電子技術;2007年20期

9 李繼剛;王劍;陳誠;周濤;;X-波段導航雷達測波系統(tǒng)的設計與研究[J];海洋技術;2006年02期

10 宋杰;何友;唐小明;;基于FPGA的超高速雷達信號實時采集存儲系統(tǒng)[J];電子技術應用;2005年11期



本文編號:1411219

資料下載
論文發(fā)表

本文鏈接:http://sikaile.net/kejilunwen/jisuanjikexuelunwen/1411219.html


Copyright(c)文論論文網(wǎng)All Rights Reserved | 網(wǎng)站地圖 |

版權申明:資料由用戶b3953***提供,本站僅收錄摘要或目錄,作者需要刪除請E-mail郵箱bigeng88@qq.com