發(fā)布時間：2018-01-11 06:28

  本文關(guān)鍵詞：集成電路制造中Contact Process造成SRAM失效分析與解決　出處：《上海交通大學》2013年碩士論文　論文類型：學位論文

  更多相關(guān)文章： SRAM 良率 Contact

【摘要】：本篇論文的主題是論述了在先進大規(guī)模集成電路制造中,相關(guān)于Contact制造工藝,對SRAM(靜態(tài)存儲器)成品率提高問題的實際案例分析和解決方法。眾所周知,隨著集成電路制造中器件的關(guān)鍵尺寸變的越來越小,現(xiàn)代電子產(chǎn)品對于功耗的要求也變的越來越嚴格,低功耗,高性能,低成本已經(jīng)成為了絕對的發(fā)展趨勢。半導體產(chǎn)品的良率對于集成電路制造來說一直是非常重要的衡量指標。它標志著生產(chǎn)工藝的成熟度與制程的穩(wěn)定性。SRAM(靜態(tài)存儲器)對于集成電路,特別是超大規(guī)模的集成電路設(shè)計來說,是一個很重要的組成部分,它的器件在一個完整的功能芯片中往往關(guān)鍵尺寸是最小的。這樣一來它對于在制造過程中的發(fā)生的各種微小的制程差異都有著非常高的靈敏度,由于這種特性,在集成電路制造中SRAM就成為了提高集成度的一個重要的瓶頸。在集成電路制造過程中很多失效都能夠在SRAM區(qū)域中被發(fā)現(xiàn)。對于90納米以及以下的先進工藝,Contact制程的優(yōu)劣與穩(wěn)定與否是造成SRAM失效,影響良率的最主要原因,一直困擾著集成電路設(shè)計和制造的發(fā)展。 集成電路制造過程中的產(chǎn)品良率同時也是決定產(chǎn)品是否可以量產(chǎn)進入市場的一個關(guān)鍵性的因素。如果良率太低不僅會直接影響產(chǎn)品本身的穩(wěn)定性,而且也會大大增加產(chǎn)品的成本,轉(zhuǎn)而威脅到產(chǎn)品的競爭力。所以如何提升產(chǎn)品的良率,已經(jīng)是當今集成電路制造業(yè)中一項重要的議題。
[Abstract]:The theme of this paper is to discuss the Contact manufacturing process in the advanced large-scale integrated circuit manufacturing. As we all know, the key size of SRAM (static memory) device becomes smaller and smaller with the development of SRAM (static memory). Modern electronic products for power requirements have become more and more stringent, low power consumption, high performance. Low cost has become an absolute trend of development. The yield of semiconductor products has always been a very important measure of integrated circuit manufacturing. It marks the maturity of the production process and the stability of the process. SRA. M (. Static memory) for integrated circuits. Especially for VLSI design, it is a very important component. Its devices are often the least critical size in a complete functional chip, so it has a very high sensitivity to all kinds of small process differences occurring in the manufacturing process, because of this characteristic. In IC manufacturing, SRAM has become an important bottleneck to improve integration. Many failures can be found in the SRAM region during IC manufacturing. For 90 nanometers and below, Advanced technology. The quality and stability of Contact process is the main cause of SRAM failure and affects the yield of SRAM. It has been puzzling the development of IC design and manufacture. At the same time, the product yield is also a key factor to determine whether the product can be mass produced into the market. If the yield is too low, it will not only directly affect the stability of the product itself. Moreover, it will greatly increase the cost of the product and threaten the competitiveness of the product. Therefore, how to improve the yield of the product has become an important issue in the integrated circuit manufacturing industry.
【學位授予單位】：上海交通大學
【學位級別】：碩士
【學位授予年份】：2013
【分類號】：TN405;TP333

【共引文獻】

相關(guān)期刊論文 前10條

1 施敏;王強;孫玲;;ITO/Si/Al結(jié)構(gòu)太陽電池pn結(jié)光電特性仿真研究[J];半導體光電;2010年04期

2 鐘玉杰;王小強;許青;程順昌;李睿智;;CCD含氯氧化工藝仿真校準研究[J];半導體光電;2012年03期

3 舒斌;張鶴鳴;任冬玲;王偉;;基于應變Si/SiGe的CMOS電特性模擬研究[J];半導體技術(shù);2007年05期

4 馬永強;武一賓;楊瑞霞;李若凡;商耀輝;牛晨亮;卜夏正;王建峰;;X射線在超晶格材料衍射中的相干性分析[J];半導體技術(shù);2007年12期

5 趙麗霞;袁肇耿;張鶴鳴;;高壓VDMOS用外延片的外延參數(shù)設(shè)計[J];半導體技術(shù);2009年04期

6 嚴婷婷;張光春;李果華;汪義川;陳如龍;李波;;光致發(fā)光技術(shù)在Si基太陽電池缺陷檢測中的應用[J];半導體技術(shù);2010年05期

7 趙守磊;李惠軍;吳勝龍;劉巖;;小尺寸超高頻雙極晶體管工藝及特性模擬[J];微納電子技術(shù);2008年04期

8 文博;周建軍;江若璉;謝自力;陳敦軍;姬小利;韓平;張榮;鄭有p，

本文編號：1408501