本文關(guān)鍵詞：鐵電薄膜制備及新型鐵電存儲(chǔ)器研究　出處：《復(fù)旦大學(xué)》2013年博士論文　論文類型：學(xué)位論文

  更多相關(guān)文章： 鋯鈦酸鉛 界面鈍化層 薄膜晶體管 鐵酸鉍 鐵電二極管

【摘要】：鐵電存儲(chǔ)器是一種利用鐵電薄膜材料的自發(fā)極化在電場(chǎng)中兩種不同取向作為邏輯單元來存儲(chǔ)數(shù)據(jù)的非易失性存儲(chǔ)器,且具有高速度讀寫、高密度集成、抗輻射等優(yōu)點(diǎn)。本博士論文主要分為兩大部分：一部分以鋯鈦酸鉛(PZT)鐵電薄膜制備方法和性能研究為基礎(chǔ),采用新的電學(xué)測(cè)試方法研究鐵電薄膜界面鈍化層效應(yīng)和界面層電學(xué)特性,在其基礎(chǔ)上研究鐵電柵介質(zhì)／摻鋁氧化鋅薄膜的晶體管存儲(chǔ)器件；另一部分以鐵酸鉍(BFO)鐵電薄膜制備方法和性能研究為基礎(chǔ),研究BFO鐵電疇反轉(zhuǎn)調(diào)制二極管p-n結(jié)電流的阻變存儲(chǔ)器件。 第一部分,首先利用溶膠-凝膠法(Sol-Gel)制備了鋯鈦酸鉛(PZT)鐵電薄膜,并通過微電子工藝制作了金屬/鐵電薄膜/金屬(MFM)電容器結(jié)構(gòu)以及鐵電柵介質(zhì)/摻鋁氧化鋅薄膜晶體管結(jié)構(gòu),同時(shí)對(duì)PZT鐵電薄膜性能、鐵電薄膜界面鈍化層以及鐵電柵介質(zhì)／摻鋁氧化鋅薄膜晶體管的相關(guān)電學(xué)特性等進(jìn)行分析,具體內(nèi)容如下： (1)利用溶膠-凝膠法(Sol-Gel),在Pt/Ti/SiO2/Si襯底上制備PZT鐵電薄膜。研究不同鉛過量先體溶液對(duì)PZT薄膜鐵電性能影響,并得到薄膜沉積過程中優(yōu)化合理的鉛含量。研究表明,在(111)晶向Pt襯底電極上制備的PZT鐵電薄膜展示了良好的(111)擇優(yōu)取向。30%鉛過量的PZT鐵電薄膜足夠補(bǔ)償薄膜制備工藝中引發(fā)的鉛損失。薄膜展示了對(duì)稱且矩形的電滯回線(P-V)、良好的疲勞特性、蝴蝶狀C-V曲線和良好的絕緣特性等。 (2)研究了PZT鐵電薄膜矯頑電壓與頻率的關(guān)系,實(shí)驗(yàn)結(jié)果證明它符合Ishibashi的冪定律關(guān)系,頻率系數(shù)βf與界面鈍化層有緊密關(guān)系。PZT鐵電薄膜界面鈍化層會(huì)增大電疇矯頑電壓,并且界面鈍化層對(duì)矯頑電壓依賴頻率變化關(guān)系有鈍化作用。這與多數(shù)科學(xué)家們認(rèn)為界面層的存在會(huì)導(dǎo)致矯頑電壓減小的觀點(diǎn)正好相反,為電疇反轉(zhuǎn)動(dòng)力學(xué)的研究提供更加正確的實(shí)驗(yàn)數(shù)據(jù)。 (3)采用疇壁共釘扎與退釘扎效應(yīng)共存的極化疲勞模型模擬了薄膜的疲勞特性。發(fā)現(xiàn)溫度升高會(huì)惡化疲勞特性,這表明高溫有利于電荷載流子移動(dòng)并從電極注入到薄膜內(nèi)部,而載流子注入所產(chǎn)生的電荷屏蔽效應(yīng)阻止了新疇成核生長(zhǎng),從而加強(qiáng)鐵電疇壁釘扎效應(yīng)。從以上疲勞模型獲得釘扎系數(shù)F1和F2與薄膜界面層導(dǎo)電成比例關(guān)系,證明了鐵電薄膜界面鈍化層導(dǎo)電機(jī)制符合Schottky熱電荷發(fā)射機(jī)制。通得這一關(guān)系,計(jì)算出對(duì)應(yīng)F1和F2處的界面鈍化層的介電常數(shù)和厚度的參數(shù)值(β1)約為5320和8480,β1值隨疲勞次數(shù)的增加而增大表明了鐵電疲勞效應(yīng)增厚了鐵電薄膜界面層。該方法提供了一種研究鐵電薄膜界面層介電常數(shù)、勢(shì)壘高度等電學(xué)物理性質(zhì)新途徑。 (4)PZT鐵電薄膜電容-電壓(C-V)特性展現(xiàn)出一個(gè)漂亮的蝴蝶狀(butterfly profile)圖,從中得到的矯頑電壓與從電滯回線中得到的矯頑電壓一致。漏電流測(cè)試證明,30%鉛過量的PZT鐵電薄膜具有優(yōu)良的絕緣特性。 (5)通過全新的脈沖電壓法,從電疇反轉(zhuǎn)電流中直接得到鐵電薄膜矯頑電壓,證實(shí)性能優(yōu)良的30%鉛過量的PZT鐵電薄膜中界面鈍化層的存在,最終得到不同電疇極化反轉(zhuǎn)電流下的界面鈍化層的電流-電壓(Ii-Vi)關(guān)系和鐵電薄膜本征矯頑電壓。從以上關(guān)系中證明界面鈍化層電流-電壓(Ii-Vi)關(guān)系滿足Schottky熱電荷發(fā)射機(jī)制,進(jìn)一步計(jì)算出界面鈍化層的介電常數(shù)和厚度的參數(shù)值(系數(shù)βs)為14。這是傳統(tǒng)的測(cè)量技術(shù)所無法達(dá)到的。實(shí)驗(yàn)表明,電疇極化反轉(zhuǎn)電流與鐵電薄膜本征矯頑電場(chǎng)(Isw-Ec)的關(guān)系滿足Merz定律,并得到本征電疇壁激活場(chǎng)強(qiáng)(δ=1.4kV/cm)；糾正過去的疇壁激活場(chǎng)強(qiáng)計(jì)算中忽略了界面鈍化層的影響,從而不能準(zhǔn)確地反應(yīng)本征電疇壁運(yùn)動(dòng)規(guī)律。 (6)采用磁控濺射法(PVD),在室溫下在SiO2/Si襯底上制備出摻鋁氧化鋅薄膜(AZO),得到單一ZnO(002)晶相；證明在N2氣氛中以及400℃退火條件下,AZO薄膜具有良好的半導(dǎo)體特性。成功地在Pt/Ti/SiO2/Si襯底上制備出倒柵結(jié)構(gòu)的鐵電柵介質(zhì)/摻鋁氧化鋅薄膜晶體管(FeFET),在PZT鐵電薄膜基礎(chǔ)上生長(zhǎng)出的AZO薄膜也具有擇優(yōu)(002)取向。鐵電柵介質(zhì)/摻鋁氧化鋅薄膜晶體管(FeFET)隨著電疇正反兩種不同取向能夠?qū)崿F(xiàn)開關(guān)態(tài)電流轉(zhuǎn)變,柵電壓VGs=0時(shí),源漏電壓VDS=1.8V時(shí),開關(guān)比可達(dá)到1000。 論文第二部分,利用脈沖激光沉積法(PLD)制備出釕酸鍶(SRO)下電極導(dǎo)電薄膜、鐵酸鉍(BFO)鐵電薄膜,最終采用微電子工藝技術(shù)制作出Au/BFO/SRO/STO電容器結(jié)構(gòu),實(shí)現(xiàn)鐵電疇反轉(zhuǎn)調(diào)制二極管電流的阻變存儲(chǔ)器件,同時(shí)對(duì)BFO鐵電薄膜中鐵電疇反轉(zhuǎn)所引起地二極管阻變性能及其導(dǎo)電機(jī)制等進(jìn)行研究分析,具體內(nèi)容如下：利用脈沖激光沉積法(PLD),成功地在不同晶向的鈦酸鍶(STO)單晶襯底上制備出優(yōu)良導(dǎo)電性能的釕酸鍶(SRO)下電極,(100)和(111)取向的下電極的電阻率分別為359.7μΩ·cm和367.5μΩ·cm;并且薄膜表面十分平整,粗糙度都在1nm內(nèi),均方根粗糙度(RMS)都在0.25nm內(nèi)。 (1)利用PLD技術(shù)成功地在不同取向鈦酸鍶(STO)單晶襯底上生長(zhǎng)出表面平整的BFO鐵電薄膜。研究發(fā)現(xiàn)：在一定氧氣壓下,制備出表面平整的BFO鐵電薄膜應(yīng)該選擇合理的沉積溫度；在不同的制備氧氣壓下,制備出同樣平整度的薄膜在較高氧氣壓下需要較高的沉積溫度或較低的氧氣壓下需要較低沉積溫度。以上薄膜生長(zhǎng)規(guī)律同樣也適用于在不同取向SRO/STO導(dǎo)電襯底上薄膜生長(zhǎng)。物相分析表明,不管是在STO還是在SRO/STO襯底上生長(zhǎng)出的BFO鐵電薄膜都隨襯底晶向擇優(yōu)取向生長(zhǎng)。 (2)對(duì)BFO鐵電薄膜電疇進(jìn)行電學(xué)測(cè)試分析,發(fā)現(xiàn)厚的(100nm以上)BFO(100)鐵電薄膜容易釋放與襯底晶格失配引起的匹配應(yīng)力,電疇釘扎現(xiàn)象不明顯；而超薄BFO(100)鐵電薄膜(幾十個(gè)納米)由晶格匹配應(yīng)力效應(yīng)所導(dǎo)致電疇釘扎現(xiàn)象明顯。 (3)在(111)晶向STO單晶襯底上成功地制作了Au/BFO/SRO/STO電容器結(jié)構(gòu),具有隨鐵電疇反轉(zhuǎn)調(diào)制二極管電流的阻變特性,可運(yùn)用在非揮發(fā)的信息存儲(chǔ)。清晰地觀察到BFO鐵電薄膜中二極管p-n結(jié)極性隨電疇取向發(fā)生變化的現(xiàn)象,獲得穩(wěn)定的二極管電流密度可達(dá)550mA/cm2,且測(cè)量結(jié)果重復(fù)性好。通過二極管電流保持特性測(cè)試,關(guān)態(tài)電流隨時(shí)間在104秒范圍內(nèi)基本保持恒定,開態(tài)電流稍微減小,且開關(guān)電流比一直保持在5：1。該鐵電二極管阻變存儲(chǔ)器較一般金屬氧化物阻變存儲(chǔ)器(RRAM)中電導(dǎo)絲產(chǎn)生和破滅的運(yùn)行機(jī)制可靠性更高。 (4)研究表明BFO鐵電二極管電流導(dǎo)電機(jī)制為空間電荷限制電流(SCLC)。得出BFO鐵電疇反轉(zhuǎn)所引起二極管極性改變現(xiàn)象是由界面控制的類體效應(yīng)導(dǎo)電機(jī)制,其物理特性是通過極化反轉(zhuǎn)控制界面陷阱密度梯度分布實(shí)現(xiàn)正向和反向二極管極性改變。
[Abstract]:Ferroelectric memory is a non-volatile memory using a ferroelectric thin films of spontaneous polarization in the electric field of two different orientation as a logical unit to store data, and has the advantages of high speed of reading and writing, high density integration, has the advantages of anti radiation and so on. This thesis is mainly divided into two parts: one part is to zirconium titanate lead (PZT) ferroelectric thin film preparation method and performance research as the foundation, the new electrical test method of ferroelectric thin film interface passivation layer effect and interface layer using electrical properties, ferroelectric gate dielectric / aluminum doped Zinc Oxide film based on the transistor storage device; the other part of the BiFeO3 ferroelectric (BFO) film preparation method and Performance Research Based on BFO ferroelectric domain inversion MODULATION DIODE p-n junction current resistive memory devices.
The first part, firstly using sol gel method (Sol-Gel) preparation of lead zirconate titanate (PZT) ferroelectric thin films, and made of metal / metal / ferroelectric thin films by microelectronic technology (MFM) capacitor structure and ferroelectric gate dielectric / Al doped thin film transistor structure of Zinc Oxide, while PZT ferroelectric thin films properties, interface analysis the passivation layer of ferroelectric thin films and ferroelectric gate dielectric / Al doped thin film transistor of the Zinc Oxide electric characteristic, the specific contents are as follows:
(1) using sol gel method (Sol-Gel), the preparation of PZT ferroelectric thin films on Pt/Ti/SiO2/Si substrates. The influence of different lead in excess of the precursor solution on the ferroelectric properties of PZT thin films, and the lead content optimization during film deposition. The results show that the (111) crystal to Pt substrate electrode for PZT ferroelectric the films show good (111) preferred orientation of PZT ferroelectric thin films.30% lead excessive lead loss caused in the process of preparing thin films. The film shows enough compensation electric hysteresis loop and rectangular symmetry (P-V), good fatigue properties, butterfly shaped C-V curve and good insulation properties.
(2) to study the relationship of PZT ferroelectric thin films of coercive voltage and frequency. The experimental results show that it meets the power law relationship between Ishibashi, F and beta frequency coefficient of interface passivation layer of.PZT ferroelectric thin films are closely related to the interface passivation layer increases domain coercive voltage, and the interface passivation layer of the coercive voltage dependent frequency variation a passivation. Which most scientists think that the interfacial layer will lead to the decrease of the coercive voltage was opposite, provide experimental data for more accurate research for domain switching dynamics.
(3) the total domain wall pinning and depinning polarization fatigue model the effect of the coexistence of fatigue properties of thin films was simulated. The temperature will find deterioration of fatigue properties, which indicates that the high temperature is in favor of mobile charge carriers and injected from the electrode into the film, while the carrier injection charge shielding effect caused by the stop into a new domain nuclear growth, thereby strengthening the ferroelectric domain wall pinning effect. The pinning coefficient F1 and the interface of F2 and the thin film layer of conductive proportion from the above fatigue model, proved that the ferroelectric thin film interface passivation layer of conductive mechanism with Schottky thermal charge emission mechanism. Through this relationship, calculate the parameters of the interface passivation layer corresponding to F1 and F2 the dielectric constant and the thickness of the value (beta 1) is about 5320 and 8480, beta 1 increased with the increasing number of fatigue showed thickening of the ferroelectric fatigue effect of ferroelectric thin film interface layer. The method provides a kind of Research A new approach to the electrical and physical properties of the interface layer of ferroelectric thin films, such as the dielectric constant and the barrier height, is investigated.
(4) PZT ferroelectric thin film capacitance voltage (C-V) characteristics show a beautiful butterfly (Butterfly profile), the coercive voltage gain consistent with that obtained from the hysteresis loop of the coercive voltage. The leakage current test, PZT ferroelectric thin films with excess Pb 30% excellent insulating properties.
(5) the new pulse voltage method, get the ferroelectric thin film of coercive voltage directly from the domain switching current, confirmed the excellent performance of the interface passivation layer 30% Pb excess PZT ferroelectric thin films in the presence of final current voltage interface passivation layer of different electric poled under the current (Ii-Vi) of the intrinsic coercive voltage relationship and ferroelectric thin films. The interface passivation current voltage from the above relationship (Ii-Vi) between the Schottky meet the thermal charge emission mechanism, further calculates the parameters of interfacial passivation layer thickness and dielectric constant value (beta s) 14. which is unable to achieve the traditional measurement technique. Experimental results show that the intrinsic coercive electric field poled ferroelectric thin films (Isw-Ec) and the current relationship to meet Merz's law, and the intrinsic electric field activation domain wall (delta =1.4kV/cm); correct domain wall past activation calculation ignores the intensity of interfacial blunt The influence of the chemical layer can not accurately reflect the law of the intrinsic domain wall motion.
(6) by magnetron sputtering (PVD), at room temperature were fabricated on SiO2/Si substrate aluminum doped thin film (AZO), Zinc Oxide ZnO (002) single crystal phase; that in N2 atmosphere and annealed at 400 C conditions, AZO thin films have good semiconductor properties. The successful preparation of ferroelectric gate medium / inverted gate structure of Al doped Pt/Ti/ thin film transistor in Zinc Oxide SiO2/Si substrate (FeFET), AZO films grown in PZT ferroelectric thin films on the basis of a preferred (002) orientation. The ferroelectric gate dielectric / Al doped thin film transistor (FeFET) with the Zinc Oxide domain and two different orientations can realize the switch state current, the gate voltage VGs=0 when the source drain voltage VDS=1.8V, switch ratio can reach 1000.
The second part of the paper, using pulsed laser deposition (PLD) was prepared by acid strontium ruthenium (SRO) electrode conductive film, bismuth ferrite (BFO) ferroelectric thin films, eventually with micro electronics technology to produce Au/BFO/SRO/STO capacitor structure, realize ferroelectric domain inversion modulation of diode current resistive memory devices, at the same time for BFO ferroelectric thin film ferroelectric domain inversion caused by diode resistive properties and conducting mechanisms are analyzed, the specific contents are as follows: using pulsed laser deposition (PLD), successfully in different orientations of SrTiO3 (STO) substrates prepared strontium ruthenate with excellent electrical conductivity (SRO) electrode, (100) and (111) orientation of the lower electrode resistivity were 359.7. Cm and 367.5. Cm; and the film surface is very smooth, the roughness is within 1nm, the root mean square roughness (RMS) in 0.25nM.
(1) the use of PLD technology successfully in different orientation of SrTiO3 (STO) single crystal substrates of BFO ferroelectric thin films with smooth surface. The study found that: in a certain oxygen pressure, prepared by the deposition temperature of BFO ferroelectric thin films with smooth surface should be reasonable; the oxygen pressure of different preparation, preparation the deposition temperature also needs higher smoothness at higher oxygen pressure or lower oxygen pressure to lower deposition temperature. These thin film growth rule also applies to the film in different orientation of SRO/STO conductive substrates. Phase analysis shows that, whether in STO or BFO ferroelectric thin films on SRO/STO substrates the growth of the crystal orientation with the substrate orientation.
(2) electrical testing analysis on domain BFO ferroelectric thin film, found thick (above 100nm) BFO (100) ferroelectric thin film and substrate, should be easy to release stress caused by the lattice mismatch, domain pinning phenomenon is not obvious; and (100) BFO ultra-thin ferroelectric thin film (10 nm) stress effect the resulting domain pinning phenomenon was matched by the lattice.
(3) in the (111) crystal to STO single crystal substrate successfully produced Au/BFO/SRO/STO capacitor structure with variable characteristics with ferroelectric domain inversion modulation diode current resistance, which can be used in the information of non volatile storage. Clearly observed diode p-n junction polarity with domain orientation change of the phenomenon of BFO ferroelectric thin films in the stable diode current density up to 550mA/cm2, and the measurement results are reproducible. Keep the characteristic test through the diode current, off current with time in 104 seconds remained constant, open state current decreases slightly, and the on-off current ratio has been keeping memory than the general metal oxide resistive memory in the 5:1. ferroelectric diode resistor (RRAM) conductance in wire formation and operation mechanism of the bursting of the higher reliability.
(4) study showed that the BFO ferroelectric diode current conductive mechanism is the space charge limited current (SCLC). The BFO ferroelectric domain inversion caused by diode polarity change phenomenon is caused by the interface control class body effect conduction mechanism, its physical properties is the interface trap density gradient distribution to achieve forward and reverse the polarity of the diode changed by polarization switching control.

【學(xué)位授予單位】：復(fù)旦大學(xué)
【學(xué)位級(jí)別】：博士
【學(xué)位授予年份】：2013
【分類號(hào)】：O484;TP333

【參考文獻(xiàn)】

相關(guān)期刊論文 前1條

1 ;An overview of resistive random access memory devices[J];Chinese Science Bulletin;2011年Z2期

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本文編號(hào)：1374380