基于FPGA的多路地震數(shù)據(jù)采集節(jié)點(diǎn)研究與設(shè)計(jì)
發(fā)布時(shí)間：2019-06-13 17:56
【摘要】：油氣資源是國(guó)民經(jīng)濟(jì)發(fā)展的重要能源,更是我國(guó)經(jīng)濟(jì)快速發(fā)展的動(dòng)力及重要的戰(zhàn)略資源。地震勘探作為油氣資源勘探中最有效的方法,以被廣泛的應(yīng)用于復(fù)雜山地震勘探之中,而地震數(shù)據(jù)采集節(jié)點(diǎn)的性能直接決定著地震勘探儀器的好壞。地震數(shù)據(jù)采集對(duì)地震數(shù)據(jù)的拾取至關(guān)重要,是地震勘探準(zhǔn)確性和精確性的重要指標(biāo),地震數(shù)據(jù)的暫存技術(shù)的發(fā)展對(duì)地震數(shù)據(jù)可靠性和安全性具有巨大貢獻(xiàn)。針對(duì)復(fù)雜山地地震勘探儀器對(duì)采集節(jié)點(diǎn)的需求,本論文依托于國(guó)家自然科學(xué)基金重大科研儀器設(shè)備研制專項(xiàng)“復(fù)雜山地多波寬頻帶地震數(shù)據(jù)采集系統(tǒng)研制”以地震數(shù)據(jù)采集的智能化為設(shè)計(jì)目標(biāo)。由FPGA作為主導(dǎo)器件在Quartus II開發(fā)平臺(tái)下利用Verilog硬件描述語言,并采用自頂向下的設(shè)計(jì)方法,構(gòu)建了多路地震數(shù)據(jù)采集節(jié)點(diǎn)設(shè)計(jì)方案。通過開展多路地震信號(hào)并行采集、異步FIFO和SDRAM相結(jié)合的大容量數(shù)據(jù)暫存和RS485數(shù)據(jù)傳輸?shù)难芯?論文取得的主要成果如下：(1)采集節(jié)點(diǎn)關(guān)鍵電路的研究與設(shè)計(jì)。選取擁有高集成度、時(shí)序精準(zhǔn)和極強(qiáng)并行處理能力的FPGA作為系統(tǒng)的核心處理器,采用24位高分辨率模數(shù)轉(zhuǎn)換器ADS1252對(duì)地震信號(hào)進(jìn)行模擬到數(shù)字信號(hào)轉(zhuǎn)換,并設(shè)計(jì)相應(yīng)的電路。利用異步FIFO和大容量SDRAM相結(jié)合的暫存方案對(duì)多路地震數(shù)據(jù)進(jìn)行緩存,并詳細(xì)設(shè)計(jì)了SDRAM接口電路和RS485的接口電路。(2)ADC控制器的研究與設(shè)計(jì)。以FPGA作為核心控制器,實(shí)現(xiàn)對(duì)ADC的邏輯控制,并采樣獲取高精度、寬動(dòng)態(tài)范圍的采樣數(shù)據(jù)。利用有限狀態(tài)機(jī)實(shí)現(xiàn)FPGA控制多路ADC并行采集操作,使系統(tǒng)具有實(shí)時(shí)性強(qiáng)、分辨率高、干擾噪聲低等優(yōu)點(diǎn)。對(duì)ADC采樣進(jìn)行仿真和在線測(cè)試,并結(jié)合natlab仿真對(duì)比分析,驗(yàn)證了多路地震數(shù)據(jù)采集節(jié)點(diǎn)的穩(wěn)定性和可靠性。(3)異步FIFO存儲(chǔ)器的研究與設(shè)計(jì)。以FPGA作為核心控制器,對(duì)異步FIFO存儲(chǔ)器結(jié)構(gòu)進(jìn)行了詳細(xì)分析,并對(duì)各個(gè)模塊進(jìn)行詳細(xì)的討論,從而挖掘出設(shè)計(jì)中存在的關(guān)鍵問題。利用電平同步器大大降低了亞穩(wěn)態(tài)出現(xiàn)的概率,同時(shí)采用格雷碼轉(zhuǎn)換技術(shù)保證數(shù)據(jù)的可靠傳輸,提高了設(shè)計(jì)效率。通過對(duì)異步FIFO讀／寫操作的仿真與對(duì)比實(shí)驗(yàn),驗(yàn)證了異步FIFO的實(shí)用性與高效性。(4) SDRAM控制器的研究與設(shè)計(jì)。以FPGA作為核心控制器,通過有限狀態(tài)機(jī)對(duì)SDRAM核心控制邏輯進(jìn)行了描述,提高了設(shè)計(jì)效率,簡(jiǎn)化了控制邏輯。采用大容量SDRAM結(jié)合具有高速處理優(yōu)勢(shì)的FPGA,提高了系統(tǒng)速度并節(jié)省了系統(tǒng)資源。通過對(duì)SDRAM存儲(chǔ)器的時(shí)序仿真和在線測(cè)試分析,充分證明了SDRAM讀／寫操作的正確性和實(shí)用性。(5)RS485控制器研究與設(shè)計(jì)。以FPGA作為核心控制器,對(duì)RS485發(fā)送模塊和RS485接收模塊進(jìn)行相應(yīng)的邏輯設(shè)計(jì),保證了數(shù)據(jù)的可靠傳輸�？傮w來說,本文研究與設(shè)計(jì)的多路地震數(shù)據(jù)采集節(jié)點(diǎn)可以很好的應(yīng)用于地震勘探儀器中,實(shí)踐證明了該系統(tǒng)在性能和靈活性上擁有極大的優(yōu)勢(shì),并具有一定的實(shí)用性和推廣價(jià)值。
[Abstract]:The oil and gas resource is an important energy for the development of the national economy, and is the dynamic and important strategic resource of the rapid economic development of our country. Seismic exploration is the most effective method in the exploration of oil and gas resources, which is widely used in complex mountain seismic exploration, and the performance of the seismic data acquisition node directly determines the quality of the seismic exploration instrument. Seismic data acquisition is of great importance to the pickup of seismic data, which is an important index of the accuracy and accuracy of the seismic data. The development of the temporary storage technology of the seismic data has a great contribution to the reliability and safety of the seismic data. In view of the demand of the complex mountain seismic exploration instrument to the acquisition node, this paper is based on the development of the special "The development of multi-wave wide-band seismic data acquisition system in complex mountainous area" of the major scientific research instruments and equipment of the National Natural Science Foundation of China, and the intelligence of the seismic data acquisition is the design goal. The design of multi-path seismic data acquisition node is constructed by using Verilog hardware description language as the master device under the Quartus II development platform, and using the top-down design method. The main results of the paper are as follows: (1) The research and design of the key circuit of the acquisition node are as follows: (1) The research and design of the key circuit of the acquisition node. As the core processor of the system, a 24-bit high-resolution analog-to-digital converter (ADS1252) is used as the core processor of the system, and the corresponding circuit is designed. The multi-path seismic data is cached by the combination of asynchronous FIFO and high-capacity SDRAM, and the interface circuit of SDRAM interface circuit and RS485 is designed in detail. (2) The research and design of the ADC controller. With the FPGA as the core controller, the logic control of the ADC is realized, and the sampling data with high precision and wide dynamic range can be obtained. The system has the advantages of high real-time performance, high resolution, low interference noise and the like by using a finite state machine to realize the parallel acquisition operation of the FPGA control multi-channel ADC. The stability and reliability of the multi-path seismic data acquisition node are verified by simulation and on-line testing of the ADC samples, and by combining with the natlab simulation. (3) Research and design of asynchronous FIFO memory. With the FPGA as the core controller, the structure of the asynchronous FIFO memory is analyzed in detail, and the modules are discussed in detail, and the key problems in the design are excavated. By using the level synchronizer, the probability of the occurrence of the metastable state is greatly reduced, the reliable transmission of the data is ensured by adopting the Gray code conversion technology, and the design efficiency is improved. The practicability and efficiency of the asynchronous FIFO are verified by the simulation and contrast experiments of the asynchronous FIFO read/ write operation. (4) Research and design of SDRAM controller. With the FPGA as the core controller, the SDRAM core control logic is described by the finite state machine, the design efficiency is improved, and the control logic is simplified. And the high-capacity SDRAM is used for combining the FPGA with the high-speed processing advantage, so that the system speed is improved and the system resources are saved. The correctness and practicability of the SDRAM read/ write operation are proved by the time sequence simulation and on-line test analysis of the SDRAM memory. (5) Research and design of RS485 controller. With the FPGA as the core controller, the RS485 transmission module and the RS485 receiving module are designed to ensure the reliable transmission of the data. In general, the research and design of the multi-way seismic data acquisition node can be well applied to the seismic exploration instrument, which has proved that the system has great advantages in performance and flexibility, and has certain practicability and popularization value.
【學(xué)位授予單位】：成都理工大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：P631.4
本文編號(hào)：2498705
[Abstract]:The oil and gas resource is an important energy for the development of the national economy, and is the dynamic and important strategic resource of the rapid economic development of our country. Seismic exploration is the most effective method in the exploration of oil and gas resources, which is widely used in complex mountain seismic exploration, and the performance of the seismic data acquisition node directly determines the quality of the seismic exploration instrument. Seismic data acquisition is of great importance to the pickup of seismic data, which is an important index of the accuracy and accuracy of the seismic data. The development of the temporary storage technology of the seismic data has a great contribution to the reliability and safety of the seismic data. In view of the demand of the complex mountain seismic exploration instrument to the acquisition node, this paper is based on the development of the special "The development of multi-wave wide-band seismic data acquisition system in complex mountainous area" of the major scientific research instruments and equipment of the National Natural Science Foundation of China, and the intelligence of the seismic data acquisition is the design goal. The design of multi-path seismic data acquisition node is constructed by using Verilog hardware description language as the master device under the Quartus II development platform, and using the top-down design method. The main results of the paper are as follows: (1) The research and design of the key circuit of the acquisition node are as follows: (1) The research and design of the key circuit of the acquisition node. As the core processor of the system, a 24-bit high-resolution analog-to-digital converter (ADS1252) is used as the core processor of the system, and the corresponding circuit is designed. The multi-path seismic data is cached by the combination of asynchronous FIFO and high-capacity SDRAM, and the interface circuit of SDRAM interface circuit and RS485 is designed in detail. (2) The research and design of the ADC controller. With the FPGA as the core controller, the logic control of the ADC is realized, and the sampling data with high precision and wide dynamic range can be obtained. The system has the advantages of high real-time performance, high resolution, low interference noise and the like by using a finite state machine to realize the parallel acquisition operation of the FPGA control multi-channel ADC. The stability and reliability of the multi-path seismic data acquisition node are verified by simulation and on-line testing of the ADC samples, and by combining with the natlab simulation. (3) Research and design of asynchronous FIFO memory. With the FPGA as the core controller, the structure of the asynchronous FIFO memory is analyzed in detail, and the modules are discussed in detail, and the key problems in the design are excavated. By using the level synchronizer, the probability of the occurrence of the metastable state is greatly reduced, the reliable transmission of the data is ensured by adopting the Gray code conversion technology, and the design efficiency is improved. The practicability and efficiency of the asynchronous FIFO are verified by the simulation and contrast experiments of the asynchronous FIFO read/ write operation. (4) Research and design of SDRAM controller. With the FPGA as the core controller, the SDRAM core control logic is described by the finite state machine, the design efficiency is improved, and the control logic is simplified. And the high-capacity SDRAM is used for combining the FPGA with the high-speed processing advantage, so that the system speed is improved and the system resources are saved. The correctness and practicability of the SDRAM read/ write operation are proved by the time sequence simulation and on-line test analysis of the SDRAM memory. (5) Research and design of RS485 controller. With the FPGA as the core controller, the RS485 transmission module and the RS485 receiving module are designed to ensure the reliable transmission of the data. In general, the research and design of the multi-way seismic data acquisition node can be well applied to the seismic exploration instrument, which has proved that the system has great advantages in performance and flexibility, and has certain practicability and popularization value.
【學(xué)位授予單位】：成都理工大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：P631.4
【參考文獻(xiàn)】
相關(guān)碩士學(xué)位論文 前1條
1 張亞瓊;一種基于低能X射線的快速探測(cè)采集系統(tǒng)研制[D];重慶大學(xué);2011年
，本文編號(hào)：2498705
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