基于pay-per-use機制的FPGA知識產(chǎn)權(quán)保護技術(shù)研究
發(fā)布時間：2021-05-19 05:48
現(xiàn)場可編程門陣列（FPGA）作為重復(fù)可編程邏輯器件,在過去的幾十年中被廣泛應(yīng)用于大多數(shù)數(shù)字系統(tǒng)的開發(fā)。與專用集成電路（ASIC）相比,FPGA具有密度高、可重復(fù)編程的靈活性、非重復(fù)性工程成本（NRE）低、產(chǎn)品上市時間快等優(yōu)點,這些優(yōu)點使FPGA成為醫(yī)學(xué)、通信、消費電子、軍事裝備等各種應(yīng)用領(lǐng)域流行的設(shè)計平臺,但也同樣導(dǎo)致FPGA成為剽竊盜版的主要目標。隨著半導(dǎo)體工藝技術(shù)的快速發(fā)展,集成電路（IC）設(shè)計復(fù)雜度不斷提高,這使得單一主體在FPGA上設(shè)計一個完整的高級的功能系統(tǒng)成為一項幾乎無法完成的任務(wù)。因此,可重用的知識產(chǎn)權(quán)（IP）設(shè)計模塊被廣泛應(yīng)用于越來越復(fù)雜的FPGA開發(fā)平臺,以減輕設(shè)計人員的工作負擔(dān),提高設(shè)計效率并縮短設(shè)計開發(fā)的周期。然而,流行是把雙刃劍,IP核的普及流行在為集成電路設(shè)計開發(fā)帶來便利的同時,也同樣為IP侵權(quán)打開了方便之門。FPGA或IP設(shè)計是由字符串表示的,這些字符串也被稱為比特流,因此通過竊聽等手段復(fù)制有價值的設(shè)計是容易實現(xiàn)的。仿冒ASIC是一項耗時、費力、且價格昂貴的工作,相比之下,盜取和復(fù)制配置比特流則相對簡單,因此FPGA成了這些惡意竊賊的主要目標。不幸的是,近年...
【文章來源】：哈爾濱工業(yè)大學(xué)黑龍江省 211工程院校 985工程院校
【文章頁數(shù)】：66 頁
【學(xué)位級別】：碩士
【文章目錄】：
摘要
Abstract
Acknowledgement
Nomenclature
Chapter1 Introduction
1.1 The Phenomenon of IP Piracy
1.2 Types of IP Threat and Current Protection Techniques
1.3 PUF Introduction and Application in IP Protection
1.4 Motivations and Objectives
1.5 Organization of the Dissertation
Chapter2 Literature Review
2.1 Digital Signature-based Scheme
2.2 Bitstream Encryption-based Scheme
2.3 Pay-per-use Licensing Model
2.4 PUF-FSM Binding Scheme
2.5 Research and Extraction Method of PUF
2.6 Summary
Chapter3 A New Pay-per-use Scheme for FPGA IP Protection
3.1 Overview of the Proposed Pay-per-use Scheme
3.2 The Design to Retrieve PUF Response
3.3 The Locking Scheme on FSM
3.3.1 The Structure of Expanded EFSM
3.3.2 The Structure of Pseudo Reset States
3.3.3 The Number of States in EFSM
3.4 The Design of Controller
3.5 The Generation of License and an Illustrative Example
3.6 Summary
Chapter4 Experimental Results and Security Analysis of the Proposed Scheme
4.1 Experimental Results and Analysis
4.1.1 Experiments Implemented on Design Compiler
4.1.2 Experiments Implemented on FPGA
4.2 Analysis of Security
4.3 Summary
Conclusions
References
Author’s Publications
本文編號：3195235
【文章來源】：哈爾濱工業(yè)大學(xué)黑龍江省 211工程院校 985工程院校
【文章頁數(shù)】：66 頁
【學(xué)位級別】：碩士
【文章目錄】：
摘要
Abstract
Acknowledgement
Nomenclature
Chapter1 Introduction
1.1 The Phenomenon of IP Piracy
1.2 Types of IP Threat and Current Protection Techniques
1.3 PUF Introduction and Application in IP Protection
1.4 Motivations and Objectives
1.5 Organization of the Dissertation
Chapter2 Literature Review
2.1 Digital Signature-based Scheme
2.2 Bitstream Encryption-based Scheme
2.3 Pay-per-use Licensing Model
2.4 PUF-FSM Binding Scheme
2.5 Research and Extraction Method of PUF
2.6 Summary
Chapter3 A New Pay-per-use Scheme for FPGA IP Protection
3.1 Overview of the Proposed Pay-per-use Scheme
3.2 The Design to Retrieve PUF Response
3.3 The Locking Scheme on FSM
3.3.1 The Structure of Expanded EFSM
3.3.2 The Structure of Pseudo Reset States
3.3.3 The Number of States in EFSM
3.4 The Design of Controller
3.5 The Generation of License and an Illustrative Example
3.6 Summary
Chapter4 Experimental Results and Security Analysis of the Proposed Scheme
4.1 Experimental Results and Analysis
4.1.1 Experiments Implemented on Design Compiler
4.1.2 Experiments Implemented on FPGA
4.2 Analysis of Security
4.3 Summary
Conclusions
References
Author’s Publications
本文編號：3195235
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