基于VHDL語言和FPGA的電子密碼鎖
發(fā)布時間:2019-03-07 13:35
【摘要】:隨著科技水平的提高,普通機械鎖不能滿足人們對安全防盜的要求。電子密碼鎖應(yīng)運而生,并且在銀行、實驗室等對安全性要求較高的地方越來越普及。本次設(shè)計的載體是現(xiàn)場可編程邏輯器件(FPGA),用硬件描述語言(VHDL)在Altera公司的MAX-PLUSII平臺上完成硬件主體設(shè)計、功能仿真和時序分析,給出了一種電子密碼鎖的設(shè)計方案。所設(shè)計的電子密碼鎖具有上鎖功能,解鎖功能,重置密碼功能,清零功能和系統(tǒng)報警功能。當連續(xù)三次輸入錯誤密碼時,系統(tǒng)在第四次輸入密碼時即發(fā)出警報。本文首先介紹了FPGA的工作原理、芯片結(jié)構(gòu)、設(shè)計流程和發(fā)展方向,還有VHDL的特點和結(jié)構(gòu)。然后詳細介紹了六位電子密碼鎖的設(shè)計過程和各個模塊的設(shè)計程序。本次設(shè)計的系統(tǒng)按照過程逐步細致劃分為三個部分,第一部分是鍵盤模塊電路,包括提供時鐘信號的時鐘產(chǎn)生電路,為密碼鎖輸入密碼的鍵盤輸入電路,通過動態(tài)掃描和按鍵操作產(chǎn)生數(shù)字組合的鍵盤掃描電路,把數(shù)字組合轉(zhuǎn)譯成鍵盤各按鍵功能的鍵盤譯碼電路和使輸入的密碼逐個顯示的數(shù)字存儲電路。第二部分是密碼鎖總控制電路,包括數(shù)字按鍵輸入電路,功能按鍵設(shè)計電路,密碼上鎖、解鎖、清除電路和系統(tǒng)報警電路。第三部分是顯示電路,包括六選一數(shù)據(jù)選擇電路和七段數(shù)碼管顯示電路。
[Abstract]:With the improvement of science and technology, ordinary mechanical locks can not meet the requirements of security and anti-theft. The electronic password lock emerges as the times require, and in the bank, the laboratory and so on the higher security request place is more and more popular. The carrier of this design is the field programmable logic device (FPGA),) and the hardware description language (VHDL) to complete the hardware main body design, function simulation and timing analysis on the MAX-PLUSII platform of Altera Company. A design scheme of the electronic password lock is given. The designed electronic password lock has lock function, unlock function, reset password function, zero clearing function and system alarm function. When the wrong password is entered three times in a row, the system alarms when the password is entered the fourth time. This paper first introduces the working principle, chip structure, design flow and development direction of FPGA, as well as the characteristics and structure of VHDL. Then the design process of the six-bit electronic cipher lock and the design procedure of each module are introduced in detail. The system is divided into three parts step by step according to the process. The first part is the keyboard module circuit, including the clock generation circuit which provides the clock signal, and the keyboard input circuit which inputs the password for the password lock. By means of dynamic scanning and keystroke operation, the digital combination is translated into keyboard decoding circuit with keypad function and digital memory circuit to display the input password one by one. The second part is the main control circuit of password lock, including digital key input circuit, function key design circuit, password lock, unlock circuit, clear circuit and system alarm circuit. The third part is the display circuit, including six-select one data selection circuit and seven-segment digital display circuit.
【學(xué)位授予單位】:內(nèi)蒙古大學(xué)
【學(xué)位級別】:碩士
【學(xué)位授予年份】:2015
【分類號】:TS914.211.7;TN791
本文編號:2436166
[Abstract]:With the improvement of science and technology, ordinary mechanical locks can not meet the requirements of security and anti-theft. The electronic password lock emerges as the times require, and in the bank, the laboratory and so on the higher security request place is more and more popular. The carrier of this design is the field programmable logic device (FPGA),) and the hardware description language (VHDL) to complete the hardware main body design, function simulation and timing analysis on the MAX-PLUSII platform of Altera Company. A design scheme of the electronic password lock is given. The designed electronic password lock has lock function, unlock function, reset password function, zero clearing function and system alarm function. When the wrong password is entered three times in a row, the system alarms when the password is entered the fourth time. This paper first introduces the working principle, chip structure, design flow and development direction of FPGA, as well as the characteristics and structure of VHDL. Then the design process of the six-bit electronic cipher lock and the design procedure of each module are introduced in detail. The system is divided into three parts step by step according to the process. The first part is the keyboard module circuit, including the clock generation circuit which provides the clock signal, and the keyboard input circuit which inputs the password for the password lock. By means of dynamic scanning and keystroke operation, the digital combination is translated into keyboard decoding circuit with keypad function and digital memory circuit to display the input password one by one. The second part is the main control circuit of password lock, including digital key input circuit, function key design circuit, password lock, unlock circuit, clear circuit and system alarm circuit. The third part is the display circuit, including six-select one data selection circuit and seven-segment digital display circuit.
【學(xué)位授予單位】:內(nèi)蒙古大學(xué)
【學(xué)位級別】:碩士
【學(xué)位授予年份】:2015
【分類號】:TS914.211.7;TN791
【參考文獻】
相關(guān)期刊論文 前8條
1 宋翠翠;董永鑫;郭華帥;陳同洲;;電子時鐘仿真及其FPGA實現(xiàn)[J];中國傳媒大學(xué)學(xué)報(自然科學(xué)版);2009年01期
2 童世華;付蔚;;談ASIC、FPGA/CPLD的區(qū)別與發(fā)展[J];重慶職業(yè)技術(shù)學(xué)院學(xué)報;2007年06期
3 尹會明;;基于VHDL語言的倒計時搶答器設(shè)計[J];信息化研究;2009年11期
4 張小新;魏厚龍;;FPGA技術(shù)及其開發(fā)方式概述[J];山西電子技術(shù);2008年05期
5 張奎剛,徐連海,張華;ALTERA FPGA簡介及其在LED顯示屏控制中的應(yīng)用[J];微處理機;2000年02期
6 劉曉靜;;EDA技術(shù)及其應(yīng)用[J];咸寧學(xué)院學(xué)報;2006年06期
7 王紅航;張華斌;;電子密碼鎖的EDA設(shè)計與實現(xiàn)[J];電子元器件應(yīng)用;2009年06期
8 徐吉鋒;;基于FPGA的VGA顯示實驗方法[J];實驗室科學(xué);2010年05期
相關(guān)碩士學(xué)位論文 前1條
1 張曉娟;基于FPGA的實時視頻信號處理系統(tǒng)的設(shè)計[D];太原理工大學(xué);2012年
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