SRAM單粒子加固設(shè)計(jì)
發(fā)布時(shí)間：2018-12-15 00:21
【摘要】：集成電路作為電子設(shè)備的控制中樞取得了廣泛的應(yīng)用,其安全穩(wěn)定性日益受到各界關(guān)注。然而集成電路容易受空間高能粒子輻射而損壞,特別是作為大量數(shù)據(jù)載體的SRAM在復(fù)雜的輻射環(huán)境中顯得尤為脆弱。近20余年來,SRAM抗輻照加固技術(shù)取得的長(zhǎng)足的發(fā)展,加固對(duì)各種粒子輻射環(huán)境中的SRAM起到了一定的保護(hù)作用。本文在研究和總結(jié)已有加固技術(shù)的基礎(chǔ)上,基于雙互鎖存單元DICE(Double Interlocked Storage Cell)提出了全狀態(tài)下抗單粒子輻射SRAM單元存儲(chǔ)結(jié)構(gòu)DDICE(Delay DICE),采用該結(jié)構(gòu)設(shè)計(jì)了一款抗單粒子效應(yīng)加固SRAM,并對(duì)設(shè)計(jì)的SRAM做了功能驗(yàn)證和抗單粒子效應(yīng)驗(yàn)證。本論文的主要工作如下:1.本文對(duì)空間輻射環(huán)境做了詳細(xì)理論研究,分析了SRAM存儲(chǔ)單元各種輻射效應(yīng)的產(chǎn)生機(jī)理,總結(jié)了現(xiàn)有加固技術(shù):電阻加固、電路設(shè)計(jì)加固、工藝加固以及糾錯(cuò)編碼加固的加固原理以及不足之處。2.引入加固SRAM存儲(chǔ)單元的設(shè)計(jì)思想,基于DICE結(jié)構(gòu),采用延時(shí)和濾波技術(shù)設(shè)計(jì)了一種在靜態(tài)存儲(chǔ)以及動(dòng)態(tài)讀寫狀態(tài)下對(duì)單粒子輻射具有免疫作用的SRAM存儲(chǔ)結(jié)構(gòu)DDICE單元,可以濾除1 ns寬度的SET翻轉(zhuǎn)脈沖。3.研究并設(shè)計(jì)了與DDICE單元配套SRAM外圍電路,基于全定制電路設(shè)計(jì)流程設(shè)計(jì)了一款容量大小為128 Kb的加固SRAM,包括原理圖設(shè)計(jì)、前仿真、版圖設(shè)計(jì)、后仿真、參數(shù)提取以及DRC和LVS驗(yàn)證。4.最后對(duì)設(shè)計(jì)的SRAM版圖做了時(shí)序和功能仿真,以及抗單粒子效應(yīng)驗(yàn)證和功耗測(cè)試。本設(shè)計(jì)在靜態(tài)時(shí)具有與DICE相似的抗單粒子效果,線性能量傳輸值LET可以達(dá)到37.7218,在寫狀態(tài)LET達(dá)到26.1708 Me V×cm2/mg,在讀狀態(tài)LET超過了37.6351 Me V×cm2/mg,遠(yuǎn)高于經(jīng)典DICE結(jié)構(gòu)在讀寫狀態(tài)下的6.7511Me V ×cm2/ mg和6.6662Me V ×cm2/ mg。與六管SRAM和DICE相比,本設(shè)計(jì)除了面積有所增加外,抗單粒子效應(yīng)能力具有了顯著的提升,平均功耗約為11.96 m W。
[Abstract]:Integrated circuit (IC) has been widely used as the control center of electronic equipment, and its safety and stability have been paid more and more attention. However, integrated circuits are vulnerable to high energy space particle radiation, especially SRAM, which is a large number of data carriers, is particularly vulnerable in complex radiation environment. In recent 20 years, SRAM radiation resistant reinforcement technology has made great progress, and reinforcement has played a certain role in protecting SRAM in various particle radiation environment. In this paper, based on the research and summary of the existing reinforcement techniques, a novel SRAM cell storage structure, DDICE (Delay DICE), is proposed based on the dual-interlocking unit (DICE (Double Interlocked Storage Cell) to resist single particle radiation in the whole state. A new type of anti-single particle effect reinforcement SRAM, is designed, and the designed SRAM is verified by function and anti-single particle effect. The main work of this paper is as follows: 1. This paper makes a detailed theoretical study on the space radiation environment, analyzes the mechanism of various radiation effects in SRAM memory cells, and summarizes the existing reinforcement technologies: resistance strengthening, circuit design strengthening, Technical reinforcement and error correction code reinforcement of the reinforcement principle and shortcomings. 2. This paper introduces the design idea of reinforced SRAM memory cell, based on DICE structure, uses delay and filtering techniques to design a SRAM storage structure DDICE cell which has immune effect to single particle radiation in static storage and dynamic read and write state. Can filter 1 ns width of SET flip pulse. 3. The peripheral circuit of SRAM matching with DDICE unit is studied and designed. Based on the design flow of fully customized circuit, a reinforced SRAM, with capacity of 128 Kb is designed, including schematic design, pre-simulation, layout design and post-simulation. Parameter extraction and DRC and LVS validation. 4. Finally, the timing and function of the SRAM layout are simulated, and the anti-single-particle effect is verified and power consumption is tested. This design has the same anti-single particle effect as DICE in static state. The linear energy transfer value (LET) can reach 37.7218, and the LET in write state is 26.1708 Me V 脳 cm2/mg, LET is more than 37.6351 Me V 脳 cm2/mg,. Far higher than the 6.7511Me V 脳 cm2/ mg and 6.6662Me V 脳 cm2/ mg. of classical DICE structure in read and write state. Compared with the six-transistor SRAM and DICE, the design has an increase in area, and a remarkable increase in the ability of anti-single particle effect. The average power consumption is about 11.96mW.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：TN402
本文編號(hào)：2379586
[Abstract]:Integrated circuit (IC) has been widely used as the control center of electronic equipment, and its safety and stability have been paid more and more attention. However, integrated circuits are vulnerable to high energy space particle radiation, especially SRAM, which is a large number of data carriers, is particularly vulnerable in complex radiation environment. In recent 20 years, SRAM radiation resistant reinforcement technology has made great progress, and reinforcement has played a certain role in protecting SRAM in various particle radiation environment. In this paper, based on the research and summary of the existing reinforcement techniques, a novel SRAM cell storage structure, DDICE (Delay DICE), is proposed based on the dual-interlocking unit (DICE (Double Interlocked Storage Cell) to resist single particle radiation in the whole state. A new type of anti-single particle effect reinforcement SRAM, is designed, and the designed SRAM is verified by function and anti-single particle effect. The main work of this paper is as follows: 1. This paper makes a detailed theoretical study on the space radiation environment, analyzes the mechanism of various radiation effects in SRAM memory cells, and summarizes the existing reinforcement technologies: resistance strengthening, circuit design strengthening, Technical reinforcement and error correction code reinforcement of the reinforcement principle and shortcomings. 2. This paper introduces the design idea of reinforced SRAM memory cell, based on DICE structure, uses delay and filtering techniques to design a SRAM storage structure DDICE cell which has immune effect to single particle radiation in static storage and dynamic read and write state. Can filter 1 ns width of SET flip pulse. 3. The peripheral circuit of SRAM matching with DDICE unit is studied and designed. Based on the design flow of fully customized circuit, a reinforced SRAM, with capacity of 128 Kb is designed, including schematic design, pre-simulation, layout design and post-simulation. Parameter extraction and DRC and LVS validation. 4. Finally, the timing and function of the SRAM layout are simulated, and the anti-single-particle effect is verified and power consumption is tested. This design has the same anti-single particle effect as DICE in static state. The linear energy transfer value (LET) can reach 37.7218, and the LET in write state is 26.1708 Me V 脳 cm2/mg, LET is more than 37.6351 Me V 脳 cm2/mg,. Far higher than the 6.7511Me V 脳 cm2/ mg and 6.6662Me V 脳 cm2/ mg. of classical DICE structure in read and write state. Compared with the six-transistor SRAM and DICE, the design has an increase in area, and a remarkable increase in the ability of anti-single particle effect. The average power consumption is about 11.96mW.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：TN402
【參考文獻(xiàn)】
相關(guān)碩士學(xué)位論文 前2條
1 袁子陽;抗輻射加固“龍芯”處理器的空間輻射環(huán)境適應(yīng)性研究及航天計(jì)算機(jī)設(shè)計(jì)[D];中國(guó)科學(xué)院研究生院（空間科學(xué)與應(yīng)用研究中心）;2009年
2 向文超;抗輻照SRAM存儲(chǔ)器的設(shè)計(jì)[D];國(guó)防科學(xué)技術(shù)大學(xué);2010年
，本文編號(hào)：2379586
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