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基于蒙特卡洛的CMOS電路節(jié)能設計方法

發(fā)布時間:2018-11-25 18:27
【摘要】:針對CMOS電路狀態(tài)轉換試驗中諸多無用轉換導致異常能耗問題。提出一種基于蒙特卡洛的CMOS電路節(jié)能設計方法。計算CMOS電路無時延平均功耗與有時延平均功耗之間的切換規(guī)律,計算電路功耗最低值,將最低值對應的狀態(tài)轉換時間設置為蒙特卡洛推算中的變量,通過蒙特卡洛推算調(diào)整狀態(tài)的轉換次數(shù),降低動態(tài)能耗和狀態(tài)轉換過程中的能量消耗。通過實驗證明,所提方法對CMOS電路節(jié)能設計效果較好,能夠有效地降低大型CMOS電路能耗。
[Abstract]:In order to solve the problem of abnormal energy consumption caused by many useless transitions in state transition test of CMOS circuits. A method of energy saving design for CMOS circuit based on Monte Carlo is presented. The switching law between the delay free average power and the delay average power consumption in CMOS circuits is calculated, the minimum power consumption is calculated, and the state transition time corresponding to the minimum value is set to be the variable in Monte Carlo calculation. In order to reduce the dynamic energy consumption and the energy consumption in the process of state transition, Monte Carlo is used to calculate the number of state conversion. The experimental results show that the proposed method is effective in energy saving design of CMOS circuits and can effectively reduce the energy consumption of large CMOS circuits.
【作者單位】: 華北理工大學附屬醫(yī)院信息科;
【分類號】:TN432

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1 萬某峰;趙長勝;;UKF濾波中蒙特卡洛采樣策略比較分析[J];測繪通報;2012年12期



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