【摘要】：OTDR（Optical Time Domain Reflectometer，光時(shí)域反射儀）是一種光纖測(cè)量專用儀器，它根據(jù)瑞利散射測(cè)算出光纖延長(zhǎng)度的損耗信息，根據(jù)菲涅爾反射定位光纖事件位置，，是光纖通信領(lǐng)域不可缺少的測(cè)量和維護(hù)設(shè)備。目前，OTDR除了要具備大動(dòng)態(tài)范圍、小盲區(qū)、高分辨率等性能，還要具備較強(qiáng)的數(shù)據(jù)交換能力以及較快的數(shù)據(jù)處理能力。信號(hào)采集系統(tǒng)作為OTDR主要組成部分，承擔(dān)著OTDR返回光信號(hào)的采集、存儲(chǔ)、傳輸、處理的重要功能。隨著實(shí)際工程對(duì)OTDR的性能要求越來(lái)越高，OTDR對(duì)信號(hào)采集系統(tǒng)也提出了更高的要求。 本文在對(duì)數(shù)據(jù)采集技術(shù)以及OTDR原理的研究基礎(chǔ)上，結(jié)合OTDR的發(fā)展需要，以實(shí)現(xiàn)信號(hào)高速采集、數(shù)據(jù)高無(wú)縫速存儲(chǔ)和傳輸、改善信噪比為目標(biāo)，提出一種基于FPGA的光時(shí)域反射儀信號(hào)采集系統(tǒng)。該系統(tǒng)以Altera公司的FPGA芯片EP4CE40F23C8N作為核心控制芯片，利用高性能低功耗模數(shù)轉(zhuǎn)換芯片AD9230進(jìn)行快速數(shù)字化，考慮了采集系統(tǒng)數(shù)據(jù)存儲(chǔ)和數(shù)據(jù)傳輸高速和實(shí)時(shí)的需要，利用兩片SRAM存儲(chǔ)器ISSI61LV25616通過(guò)乒乓操作進(jìn)行數(shù)據(jù)存儲(chǔ)，同時(shí)結(jié)合USB接口高速數(shù)據(jù)吞吐的優(yōu)勢(shì)，使用USB數(shù)據(jù)線實(shí)現(xiàn)與上位機(jī)的數(shù)據(jù)傳遞，最終實(shí)現(xiàn)光時(shí)域反射儀信號(hào)采集系統(tǒng)。 本系統(tǒng)由硬件與軟件共同組成。系統(tǒng)硬件設(shè)計(jì)包括FPGA核心電路模塊、信號(hào)接收與調(diào)理電路模塊、模數(shù)轉(zhuǎn)換電路模塊、數(shù)據(jù)存儲(chǔ)電路模塊、USB接口電路模塊、時(shí)鐘晶振與電源電路模塊，本文對(duì)各模塊的設(shè)計(jì)思路和電路進(jìn)行了介紹。系統(tǒng)軟件設(shè)計(jì)包括下位機(jī)FPGA邏輯功能設(shè)計(jì)和上位機(jī)信號(hào)線性累加處理。其中，F(xiàn)PGA邏輯功能設(shè)計(jì)部分分為AD控制模塊、FIFO緩沖模塊、存儲(chǔ)控制模塊、USB接口控制模塊等，本文從狀態(tài)轉(zhuǎn)換、邏輯功能等方面對(duì)各個(gè)模塊進(jìn)行了說(shuō)明，并應(yīng)用Modelsim軟件對(duì)各個(gè)模塊進(jìn)行了功能仿真。信號(hào)線性累加處理部分介紹了算法主要流程，應(yīng)用Matlab軟件設(shè)計(jì)了圖型顯示界面并實(shí)現(xiàn)了線性累加算法的仿真。
[Abstract]:OTDR (Optical Time Domain Reflectometer, optical time domain reflectometer (OTDR) is a special optical fiber measurement instrument, which calculates the loss information of fiber extension according to Rayleigh scattering, and locates the location of optical fiber event according to Fresnel reflection. Is an indispensable measurement and maintenance equipment in the field of optical fiber communication. At present, OTDR not only has large dynamic range, small blind area, high resolution and so on, but also has strong data exchange ability and fast data processing ability. As the main component of OTDR, the signal acquisition system is responsible for the important functions of OTDR signal acquisition, storage, transmission and processing. With the higher performance requirements of OTDR in practical engineering, OTDR also puts forward higher requirements for signal acquisition system. Based on the research of data acquisition technology and OTDR principle, combined with the development needs of OTDR, this paper aims to achieve high-speed signal acquisition, high-speed storage and transmission of data, and improve signal-to-noise ratio (SNR). A signal acquisition system for optical time domain reflectometer based on FPGA is proposed. In this system, the FPGA chip EP4CE40F23C8N of Altera Company is used as the core control chip, and the high performance and low power A / D conversion chip AD9230 is used for fast digitization. The requirement of high speed and real time data storage and data transmission in the acquisition system is considered. Two pieces of SRAM memory ISSI61LV25616 are used to store data through ping-pong operation. At the same time, combined with the advantage of high-speed data throughput of USB interface, the data transfer between PC and PC is realized by using USB data line. Finally, the signal acquisition system of optical time domain reflectometer is realized. The system is composed of hardware and software. The system hardware design includes FPGA core circuit module, signal receiving and conditioning circuit module, analog-to-digital conversion circuit module, data storage circuit module, USB interface circuit module, clock crystal oscillator and power supply circuit module. The design idea and circuit of each module are introduced in this paper. The software design of the system includes the logic function design of the lower computer FPGA and the linear accumulative processing of the upper computer signal. Among them, FPGA logic function design is divided into AD control module, FIFO buffer module, storage control module, USB interface control module, etc. The function of each module is simulated by Modelsim software. In the part of signal linear accumulation processing, the main flow of the algorithm is introduced. The graphic display interface is designed by using Matlab software and the simulation of linear accumulation algorithm is realized.
【學(xué)位授予單位】：太原理工大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：TP274.2;TN791

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