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指紋識(shí)別芯片的算法設(shè)計(jì)及其在FPGA上的原型驗(yàn)證

發(fā)布時(shí)間:2018-11-09 11:35
【摘要】:隨著現(xiàn)代社會(huì)的飛速發(fā)展,人們?cè)谏钌a(chǎn)中對(duì)于身份安全的需求與日俱增。同時(shí),作為當(dāng)前生物識(shí)別技術(shù)中發(fā)展最成熟、最便利、綜合成本最優(yōu)的技術(shù),指紋識(shí)別技術(shù)在考勤、門(mén)禁、移動(dòng)支付等行業(yè)領(lǐng)域中得到了廣泛應(yīng)用。而作為指紋識(shí)別技術(shù)的主要載體,指紋識(shí)別系統(tǒng)中的核心器件——指紋識(shí)別芯片,由于其能夠單片實(shí)現(xiàn)一套完整的指紋識(shí)別算法,成為實(shí)現(xiàn)一套優(yōu)良的指紋識(shí)別系統(tǒng)的關(guān)鍵因素,具有極高的科學(xué)研究?jī)r(jià)值。本文在對(duì)當(dāng)前的指紋識(shí)別算法以及指紋識(shí)別系統(tǒng)的研究現(xiàn)狀與成果進(jìn)行充分調(diào)研的基礎(chǔ)上,結(jié)合本學(xué)科領(lǐng)域的專業(yè)知識(shí)與技能,依托SoC FPGA平臺(tái)在軟硬件協(xié)同設(shè)計(jì)上的優(yōu)勢(shì),探索構(gòu)造一套安全級(jí)別高、價(jià)格成本低、識(shí)別效率高、具有自主知識(shí)權(quán)產(chǎn)的指紋識(shí)別算法,以及一套能夠支持此算法的、具有自定制指紋識(shí)別芯片架構(gòu)的指紋識(shí)別系統(tǒng)。本文將研究設(shè)計(jì)分為"軟件算法設(shè)計(jì)"和"硬件平臺(tái)構(gòu)建"這兩個(gè)主要部分,進(jìn)行軟硬件協(xié)同設(shè)計(jì):(1)軟件算法設(shè)計(jì):首先使用Matlab軟件,進(jìn)行指紋識(shí)別算法的原型設(shè)計(jì);其次使用VC++軟件,用C語(yǔ)言對(duì)上述算法進(jìn)行平臺(tái)無(wú)關(guān)性重構(gòu)建模,構(gòu)造平臺(tái)無(wú)關(guān)的算法C-Model;然后使用AlteraSoC EDS軟件,針對(duì)選定的SoCFPGA平臺(tái),進(jìn)行算法C-Model的跨平臺(tái)移植,并進(jìn)行算法策略、程序代碼、編譯環(huán)境等層面的軟件算法優(yōu)化;最終通過(guò)調(diào)試與改良,實(shí)現(xiàn)算法的性能、效果最優(yōu)化。(2)硬件平臺(tái)構(gòu)建:首先選定基于Altera Cyclone V SoC FPGA芯片的DE1-SoC開(kāi)發(fā)套件作為硬件開(kāi)發(fā)平臺(tái),選定FPC1011F3指紋傳感器作為指紋采集設(shè)備;其次使用Altera Quartus Ⅱ軟件以及Qsys工具,在SoC FPGA內(nèi)部構(gòu)建一個(gè)內(nèi)嵌ARM Cortex-A9硬核、定制化指紋識(shí)別芯片架構(gòu)的嵌入式微處理器;然后待算法移植到此處理器中,進(jìn)行軟硬件聯(lián)調(diào)與優(yōu)化,并對(duì)部分算法步驟進(jìn)行硬件加速。最終實(shí)現(xiàn)功能完整、安全高效的指紋識(shí)別系統(tǒng)。本文的指紋識(shí)別算法,在實(shí)現(xiàn)基本功能的前提下,通過(guò)一系列針對(duì)性的軟硬件優(yōu)化方案,可達(dá)6倍左右的效率提升。同時(shí),本文的指紋識(shí)別系統(tǒng),經(jīng)過(guò)大量而嚴(yán)格的測(cè)試,其整體性能最終可達(dá):平均處理時(shí)間=722.97毫秒,認(rèn)假率FAR=0.00%,拒真率FRR=8.2%?紤]到實(shí)際指紋輸入過(guò)程中的噪聲干擾,此指標(biāo)已經(jīng)能夠滿足設(shè)計(jì)要求,證明本文的算法與系統(tǒng)的高安全性、高識(shí)別效率等特性。最后,本文對(duì)課題設(shè)計(jì)過(guò)程中遇到的疑難問(wèn)題與解決方案進(jìn)行分析與總結(jié),并對(duì)課題的后續(xù)研究與深入優(yōu)化進(jìn)行規(guī)劃與展望。
[Abstract]:With the rapid development of modern society, the demand for identity security is increasing in life production. At the same time, as the most mature, convenient and cost optimal technology in biometrics, fingerprint identification technology has been widely used in the fields of attendance, entrance control, mobile payment and so on. As the main carrier of fingerprint identification technology, fingerprint identification chip is the core device of fingerprint identification system, because it can realize a complete fingerprint identification algorithm. It has become the key factor to realize a set of fine fingerprint identification system, and has the extremely high scientific research value. On the basis of investigating the current research status and achievements of fingerprint identification algorithm and fingerprint identification system, combining the professional knowledge and skills of this subject, this paper relies on the advantages of SoC FPGA platform in hardware and software co-design. This paper explores and constructs a fingerprint identification algorithm with high security level, low price cost, high recognition efficiency and independent knowledge right production, as well as a fingerprint identification system with custom fingerprint identification chip architecture that can support this algorithm. In this paper, the research and design are divided into two main parts: software algorithm design and hardware platform construction. (1) Software algorithm design: first, Matlab software is used to design fingerprint identification algorithm prototype; Secondly, using VC software and C language, the platform-independent reconstruction model is built, and the platform-independent algorithm C-Model is constructed. Then using AlteraSoC EDS software, aiming at the selected SoCFPGA platform, the cross-platform migration of algorithm C-Model is carried out, and the algorithm strategy, program code, compilation environment and other software algorithms are optimized. Finally, through debugging and improvement, the performance and effect of the algorithm are optimized. (2) hardware platform construction: firstly, the DE1-SoC development suite based on Altera Cyclone V SoC FPGA chip is selected as the hardware development platform. The FPC1011F3 fingerprint sensor is selected as the fingerprint acquisition equipment. Secondly, using Altera Quartus 鈪,

本文編號(hào):2320295

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