PC104故障監(jiān)控平臺(tái)FPGA程序設(shè)計(jì)
發(fā)布時(shí)間:2018-10-29 11:17
【摘要】:PC104總線是專為嵌入式控制系統(tǒng)定義的一種工業(yè)控制線,其應(yīng)用廣泛,但是內(nèi)部結(jié)構(gòu)復(fù)雜,出現(xiàn)故障不易檢測(cè)。設(shè)計(jì)了一種基于FPGA的PC104總線故障自動(dòng)監(jiān)控平臺(tái),對(duì)PC104總線信號(hào)進(jìn)行實(shí)時(shí)監(jiān)控和故障檢測(cè)。該平臺(tái)利用FPGA程序采集和處理總線信號(hào),并傳至上位機(jī)處理顯示。系統(tǒng)中利用FPGA程序?qū)崿F(xiàn)其功能模塊,包括捕獲POST上電自檢指令和BIOS自檢端口代碼、監(jiān)測(cè)總線電壓水平、監(jiān)控時(shí)鐘和復(fù)位等關(guān)鍵信號(hào)的質(zhì)量、控制PC104的自動(dòng)復(fù)位和BIOS設(shè)置模式等功能。給出上位機(jī)監(jiān)控結(jié)果和FPGA實(shí)時(shí)檢測(cè)得到的時(shí)序圖,反映了該FPGA程序在本系統(tǒng)中滿足PC104總線檢測(cè)的技術(shù)要求。
[Abstract]:PC104 bus is a kind of industrial control line defined for embedded control system. It is widely used, but its internal structure is complex, and it is difficult to detect faults. A PC104 bus fault automatic monitoring platform based on FPGA is designed to monitor and detect PC104 bus signals in real time. The platform uses FPGA program to collect and process bus signals and transmit them to the host computer for display. In the system, the FPGA program is used to realize its function module, which includes capturing the POST self-test instruction and BIOS self-checking port code, monitoring the bus voltage level, monitoring the quality of the key signals such as clock and reset, etc. Control PC104 automatic reset and BIOS setup mode and other functions. The monitoring results of the host computer and the timing diagram of the FPGA real-time detection are given, which reflects that the FPGA program meets the technical requirements of the PC104 bus detection in the system.
【作者單位】: 湖北工業(yè)大學(xué)太陽能高效利用湖北省協(xié)同創(chuàng)新中心;湖北省電網(wǎng)智能控制與裝備工程技術(shù)研究中心;
【基金】:國家自然科學(xué)基金(61471162,11605051,61601177) 國家國際科技合作專項(xiàng)(2015DFA10940)
【分類號(hào)】:TN79;TP273
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本文編號(hào):2297544
[Abstract]:PC104 bus is a kind of industrial control line defined for embedded control system. It is widely used, but its internal structure is complex, and it is difficult to detect faults. A PC104 bus fault automatic monitoring platform based on FPGA is designed to monitor and detect PC104 bus signals in real time. The platform uses FPGA program to collect and process bus signals and transmit them to the host computer for display. In the system, the FPGA program is used to realize its function module, which includes capturing the POST self-test instruction and BIOS self-checking port code, monitoring the bus voltage level, monitoring the quality of the key signals such as clock and reset, etc. Control PC104 automatic reset and BIOS setup mode and other functions. The monitoring results of the host computer and the timing diagram of the FPGA real-time detection are given, which reflects that the FPGA program meets the technical requirements of the PC104 bus detection in the system.
【作者單位】: 湖北工業(yè)大學(xué)太陽能高效利用湖北省協(xié)同創(chuàng)新中心;湖北省電網(wǎng)智能控制與裝備工程技術(shù)研究中心;
【基金】:國家自然科學(xué)基金(61471162,11605051,61601177) 國家國際科技合作專項(xiàng)(2015DFA10940)
【分類號(hào)】:TN79;TP273
,
本文編號(hào):2297544
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