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CMOS環(huán)形壓控振蕩器的研究及應(yīng)用

發(fā)布時(shí)間:2018-10-25 10:56
【摘要】:在CMOS集成電路中經(jīng)常使用到兩種類型的壓控振蕩器,即環(huán)形壓控振蕩器(VCO)和LC壓控振蕩器,LCVCO的Q值較高,有著較強(qiáng)的噪聲抑制能力,但電感占用可觀的芯片面積是其最大的缺點(diǎn)。環(huán)形VCO用CMOS純數(shù)字工藝就能夠?qū)崿F(xiàn),具有容易集成、調(diào)諧范圍寬、占用芯片面積小等優(yōu)點(diǎn),但它的相位噪聲要比LC VCO高出20-40dBc/Hz@1MHz,糟糕的相位噪聲性能成為其致命的缺點(diǎn),嚴(yán)重限制了它的應(yīng)用,目前設(shè)計(jì)具有低相位噪聲的環(huán)形VCO成為亟待解決的問題,因此本文的目的在于設(shè)計(jì)一個(gè)相位噪聲性能與LC VCO相當(dāng)?shù)沫h(huán)形VCO。本文的主要研究?jī)?nèi)容可以歸結(jié)以下幾點(diǎn):(1)對(duì)壓控振蕩器的工作原理進(jìn)行深入探討,分析和比較了幾種經(jīng)典結(jié)構(gòu)的VCO。對(duì)引入到差分延遲單元的正反饋在提高VCO的頻率、改善相位噪聲性能的貢獻(xiàn)進(jìn)行了分析,對(duì)調(diào)諧環(huán)形振蕩器頻率的幾種方式進(jìn)行了分析,對(duì)VCO的功耗、相位噪聲、頻率、輸出擺幅、線性度之間需要的折衷選擇進(jìn)行了討論。(2)討論了壓控振蕩器的噪聲機(jī)制。首先對(duì)信號(hào)路徑和控制路徑上的噪聲到相位噪聲的轉(zhuǎn)換進(jìn)行了詳細(xì)的討論;接著對(duì)相位噪聲常見的兩種模型即Lesson模型和Hajimiri模型進(jìn)行推導(dǎo),并分析了這兩種模型在相位噪聲預(yù)測(cè)方面的優(yōu)勢(shì)和不足之處;最后給出了幾種降低相位噪聲的方法。(3)使用smic180nm CMOS工藝,設(shè)計(jì)一款頻率可調(diào)范圍為2-4GHz的環(huán)形壓控振蕩器。針對(duì)環(huán)形壓控振蕩器較差的噪聲抑制能力,設(shè)計(jì)一個(gè)波形調(diào)整模塊對(duì)延遲單元的輸出節(jié)點(diǎn)在電平切換的過程中充放電流,提高延遲單元的切換速率,進(jìn)而提高波形的振幅,改善波形上升和下降時(shí)間的對(duì)稱性,最終達(dá)到降低環(huán)形壓控振蕩器相位噪聲的目的。這也是本文最具創(chuàng)新之處,這個(gè)降噪措施的提出和使用是依據(jù)對(duì)Lesson模型和Hajimiri模型的討論。最后文中還對(duì)版圖設(shè)計(jì)規(guī)則和技巧進(jìn)行討論,給出VCO完整的設(shè)計(jì)版圖。(4)介紹了壓控振蕩器的一個(gè)應(yīng)用領(lǐng)域:時(shí)鐘電路,然后對(duì)這個(gè)電路的各個(gè)模塊進(jìn)行結(jié)構(gòu)設(shè)計(jì)和最后整體電路的設(shè)計(jì),用來對(duì)VCO的性能進(jìn)行驗(yàn)證。
[Abstract]:Two types of voltage-controlled oscillators are often used in CMOS integrated circuits, that is, (VCO) and LC voltage-controlled oscillators. The Q value of LCVCO is high, and the LCVCO has strong noise suppression ability. But the inductor occupies considerable chip area is its biggest shortcoming. The circular VCO can be realized by CMOS pure digital process. It has the advantages of easy integration, wide tuning range and small chip area, but its phase noise is 20-40dBc / Hz@ 1MHz higher than that of LC VCO. The poor phase noise performance becomes its fatal disadvantage. Its application is severely restricted. At present, the design of ring VCO with low phase noise becomes an urgent problem to be solved. Therefore, the purpose of this paper is to design a ring VCO. with phase noise performance comparable to that of LC VCO. The main research contents of this paper can be summarized as follows: (1) the working principle of VCO is deeply discussed, and several classical VCO. structures are analyzed and compared. The contribution of positive feedback introduced to differential delay unit in improving the frequency and phase noise performance of VCO is analyzed. Several ways of tuning ring oscillator frequency are analyzed. The power consumption, phase noise and frequency of VCO are analyzed. The tradeoff between output swing and linearity is discussed. (2) the noise mechanism of VCO is discussed. Firstly, the transformation from noise to phase noise in signal path and control path is discussed in detail, and then two common models of phase noise, namely Lesson model and Hajimiri model, are deduced. The advantages and disadvantages of these two models in phase noise prediction are analyzed. Finally, several methods to reduce phase noise are given. (3) using smic180nm CMOS process, a ring voltage-controlled oscillator with frequency adjustable range of 2-4GHz is designed. Aiming at the poor noise suppression ability of the ring voltage-controlled oscillator, a waveform adjustment module is designed to charge and discharge the output node of the delay unit in the process of level switching, so as to improve the switching rate of the delay unit and the amplitude of the waveform. Finally, the phase noise of the ring voltage controlled oscillator is reduced by improving the symmetry of the rising and falling time of the waveform. This is the most innovative part of this paper. This noise reduction measure is based on the discussion of Lesson model and Hajimiri model. Finally, the rules and skills of layout design are discussed, and the complete layout of VCO is given. (4) A field of application of VCO: clock circuit, is introduced. Then each module of this circuit is designed and the whole circuit is designed to verify the performance of VCO.
【學(xué)位授予單位】:廣西師范大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2017
【分類號(hào)】:TN752

【參考文獻(xiàn)】

相關(guān)期刊論文 前9條

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本文編號(hào):2293504


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