【摘要】：伴隨著智能終端設(shè)備,如手機、手環(huán)、手表、電視以及日趨火爆的智能家居等迅速發(fā)展,各類電子產(chǎn)品已經(jīng)融入人們不可或缺的日常生活中。電源管理芯片作為電子產(chǎn)品的核心成分,不但使得產(chǎn)品體積減小、成本降低,功耗也在不停的降低,迎合了如今低碳環(huán)保的國際形勢。本文設(shè)計了一款無片外電容LDO,主要提升其瞬態(tài)特性與穩(wěn)定性,給出了詳細的設(shè)計流程,分別對誤差放大器、調(diào)整管、瞬態(tài)加強電路進行優(yōu)化與設(shè)計。這些優(yōu)化設(shè)計有效提高了無片外電容的穩(wěn)定性,降低了芯片失效與邏輯混亂的風險。研究了可以提高瞬態(tài)響應(yīng)的方法。通過分析幾類誤差放大器結(jié)構(gòu)特點,選擇合適結(jié)構(gòu)對參數(shù)進行優(yōu)化與設(shè)計,通過提高增益與擺率來加強瞬態(tài)響應(yīng)。論文研究了功率管類型,并提出本文設(shè)計方案,通過理論推導,對功率管參數(shù)進行優(yōu)化。論文研究了無片外電容LDO的瞬態(tài)特性。本文首先分析傳統(tǒng)LDO片外大電容作用,為無片外電容LDO研究做理論基礎(chǔ),重點研究了無片外電容LDO瞬態(tài)特性。針對影響瞬態(tài)特性的重要因素,提出一種無片外電容LDO瞬態(tài)加強電路結(jié)構(gòu)。該方法在負載變化時,會檢測到負載變化情況以電壓形式輸出,再通過RC微分電路將檢測電壓信號變成尖峰脈沖,通過瞬間導通MOS管轉(zhuǎn)換為電流信號,最后疊加到誤差放大器的尾電流上,通過加強誤差放大器的擺率來提高功率管充放電速度,減小過沖電壓。論文研究了LDO的穩(wěn)定性。通過對本文的結(jié)構(gòu)進行小信號分析,推導零點與極點公式,在系統(tǒng)的第一個主極點后面采用RC電路進行左半平面零點補償,增加相位裕度提高穩(wěn)定性。最后,本文基于0.5μmBICMOS工藝進行設(shè)計,通過Hspice平臺仿真驗證,結(jié)果表明,負載電流經(jīng)過1μs從1mA～100mA變化,下沖145mV,經(jīng)過1μs從100mA-1mA變化,過沖為129mV。在靜態(tài)工作時,靜態(tài)功耗為50μA,負載響應(yīng)時間最大僅為1.3μs,輸入信號3dB帶寬為1668Hz,0dB帶寬高達30megHz,且整個補償電容僅為4pF。
[Abstract]:With the rapid development of smart terminal devices, such as mobile phone, bracelet, watch, TV and the increasingly popular smart home, all kinds of electronic products have been integrated into people's indispensable daily life. As the core component of electronic products, power management chip not only reduces the volume, cost and power consumption of products, but also meets the international situation of low carbon environmental protection. In this paper, an off-chip capacitive LDO, is designed to improve its transient characteristics and stability, and the detailed design flow is given. The error amplifier, adjusting tube and transient strengthening circuit are optimized and designed respectively. These optimized designs can effectively improve the stability of off-chip capacitance and reduce the risk of chip failure and logic chaos. The method of improving transient response is studied. By analyzing the structural characteristics of several kinds of error amplifiers, the parameters are optimized and designed by selecting a suitable structure, and the transient response is enhanced by increasing the gain and the pendulum rate. In this paper, the type of power transistor is studied, and the design scheme of this paper is put forward, and the parameters of power tube are optimized by theoretical derivation. In this paper, the transient characteristics of a non-chip capacitive LDO are studied. In this paper, we first analyze the effect of traditional LDO off-chip large capacitance, which provides a theoretical basis for the study of out-of-chip capacitance (LDO), focusing on the transient characteristics of LDO. In view of the important factors affecting the transient characteristics, a transient strengthening circuit structure without off-chip capacitance LDO is proposed. In this method, when the load changes, the load changes will be detected in the form of voltage output, and then the detection voltage signal will be turned into a peak pulse through RC differential circuit, and the MOS tube will be converted into a current signal through the instantaneous conduction of the MOS tube. Finally, it is superimposed on the tail current of the error amplifier to increase the charge and discharge speed of the power tube and reduce the overshoot voltage by strengthening the swing rate of the error amplifier. The stability of LDO is studied in this paper. Through the small signal analysis of the structure in this paper, the formula of zero and pole is deduced, and the RC circuit is used to compensate the left half plane zero after the first main pole of the system, which increases the phase margin and improves the stability. Finally, the design is based on 0.5 渭 mBICMOS process. The simulation results on Hspice platform show that the load current changes from 1mA~100mA to 145mV by 1 渭 s, and from 100mA-1mA to 129mV by 1 渭 s. In static operation, the power consumption is 50 渭 A, the maximum load response time is 1.3 渭 s, the input signal 3dB bandwidth is 1668 Hz, the bandwidth is 30 megHz, and the compensation capacitance is only 4 PF.
【學位授予單位】：西南交通大學
【學位級別】：碩士
【學位授予年份】：2015
【分類號】：TN386

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本文編號：2279156