【摘要】：模數(shù)轉(zhuǎn)換器(ADC)能將模擬域內(nèi)的信號轉(zhuǎn)換為數(shù)字域內(nèi)的信號,是各種需要收集并處理模擬信號的系統(tǒng)中必不可少的重要部件。Sigma Delta ADC通過基于過采樣和噪聲整形技術(shù),以其高精度的特點,在音頻、先進傳感器等方面有著廣泛的研究和應用。在近年來的研究中,受線性度、分辨率、功耗、面積等指標的制衡,現(xiàn)階段Sigma Delta ADC常通過優(yōu)化調(diào)制器系統(tǒng)結(jié)構(gòu)以及利用多比特量化來提高其精度及線性度。本文主要研究Sigma Delta調(diào)制器系統(tǒng)結(jié)構(gòu)優(yōu)化及提高線性度的技術(shù)。論文完成了對基于噪聲耦合技術(shù)的Sigma Delta調(diào)制器的研究分析,對比了多種基于噪聲耦合技術(shù)的調(diào)制器結(jié)構(gòu)及其基本性能。運用MATLAB進行系統(tǒng)的行為建模及仿真,深入分析基于噪聲耦合技術(shù)的Sigma Delta調(diào)制器在精度提升的同時,線性度提升的內(nèi)在原因,同時進行了仿真與驗證。多比特量化器的應用,帶來了反饋DAC的非線性問題。這直接限制了Sigma Delta的諧波性能。如何在提高Sigma Delta系統(tǒng)線性度的同時減小額外資源消耗,成為研究的熱點。本文設計了一種基于隨機化原理的新型DWA算法,并對算法進行了系統(tǒng)的研究與仿真實現(xiàn)。利用MATLAB軟件建模,仿真驗證新型DWA算法對于調(diào)制器性能的提升作用,并與傳統(tǒng)DWA算法進行對比。新型DWA算法電路由數(shù)字硬件語言VHDL設計實現(xiàn),并在Quartus II軟件的Modelsim進行了邏輯仿真驗證。最后利用Design Compiler將RTL級代碼綜合成門級網(wǎng)表。綜合后的新型DWA算法電路相比傳統(tǒng)DWA算法在面積上下降8%,總動態(tài)功耗上下降13.9%。利用以上噪聲耦合及新型DWA技術(shù),完成了對整個Sigma Delta調(diào)制器的精度及線性度的提升,從系統(tǒng)層面上降低了Sigma Delta調(diào)制器的功耗及面積。
[Abstract]:Analog-to-digital converter (ADC) can convert signals from analog domain to digital domain. It is an essential component of various systems that need to collect and process analog signals. Sigma Delta ADC is based on over-sampling and noise shaping technology. Because of its high accuracy, it has been widely studied and applied in audio frequency, advanced sensors and so on. In recent years, due to the check and balance of linearity, resolution, power consumption, area and so on, Sigma Delta ADC usually improves its precision and linearity by optimizing the structure of modulator system and using multi-bit quantization. This paper focuses on the optimization of Sigma Delta modulator system structure and the improvement of linearity. In this paper, the research and analysis of Sigma Delta modulator based on noise-coupling technology are completed, and the structure and basic performance of various modulators based on noise-coupled technology are compared. The behavior modeling and simulation of the system based on MATLAB are carried out, and the inherent reasons of the linearity enhancement of the Sigma Delta modulator based on the noise coupling technology are deeply analyzed, and the simulation and verification are carried out at the same time. The application of multibit quantizer brings the nonlinear problem of feedback DAC. This directly limits the harmonic performance of Sigma Delta. How to improve the linearity of Sigma Delta systems and reduce the consumption of additional resources has become a hot research topic. In this paper, a novel DWA algorithm based on randomization principle is designed, and the algorithm is systematically studied and simulated. MATLAB software is used to model and simulate the new DWA algorithm to improve the performance of modulator, and compared with the traditional DWA algorithm. The new DWA algorithm circuit is designed and implemented by digital hardware language VHDL, and the logic simulation is carried out in Modelsim of Quartus II software. Finally, the RTL level code is synthesized into gate network table by Design Compiler. Compared with the traditional DWA algorithm, the new DWA algorithm circuit is reduced by 8 points in area and 13.9 in total dynamic power consumption. Using the above noise coupling and new DWA technology, the accuracy and linearity of the whole Sigma Delta modulator are improved, and the power consumption and area of the Sigma Delta modulator are reduced from the system level.
【學位授予單位】：電子科技大學
【學位級別】：碩士
【學位授予年份】：2017
【分類號】：TN761

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本文編號：2218674