光源掩模協(xié)同優(yōu)化的原理與應用
發(fā)布時間：2018-08-26 14:34
【摘要】：當半導體技術節(jié)點縮小至14 nm及以下時,光刻技術也逐漸接近了其物理極限。光源掩模協(xié)同優(yōu)化(SMO)作為一種新型的分辨率增強技術,能夠顯著提升極限尺寸下半導體光刻的重疊工藝窗口,有效延伸當前常規(guī)光刻技術的生存周期。綜述了SMO這一技術,分析了SMO的原理,介紹了該技術的發(fā)展和在半導體制造工藝中的應用,重點探討了其在先進光刻節(jié)點研發(fā)中的應用,并對其挑戰(zhàn)和發(fā)展趨勢進行了展望,認為SMO不僅是193 nm浸潤式光刻技術的重要組成部分,也將是EUV光刻中必不可少的一種技術。
[Abstract]:Light source mask co-optimization (SMO), as a new kind of resolution enhancement technology, can significantly improve the overlapping process window of semiconductor lithography under the limit size and effectively extend the life cycle of conventional lithography technology. The principle of SMO is analyzed. The development of SMO and its application in semiconductor manufacturing process are introduced. The application of SMO in the development of advanced lithographic nodes is mainly discussed. The challenges and development trend of SMO are prospected. It is considered that SMO is not only an important part of 193 nm infiltration lithography, but also an important part of EUV lithography. A necessary technology.
【作者單位】： 中國科學院微電子研究所微電子器件與集成技術重點實驗室;
【基金】：國家科技重大專項資助項目(2016ZX02301001) 國家自然科學基金資助項目(61604172)
【分類號】：TN305.7
本文編號：2205170
[Abstract]:Light source mask co-optimization (SMO), as a new kind of resolution enhancement technology, can significantly improve the overlapping process window of semiconductor lithography under the limit size and effectively extend the life cycle of conventional lithography technology. The principle of SMO is analyzed. The development of SMO and its application in semiconductor manufacturing process are introduced. The application of SMO in the development of advanced lithographic nodes is mainly discussed. The challenges and development trend of SMO are prospected. It is considered that SMO is not only an important part of 193 nm infiltration lithography, but also an important part of EUV lithography. A necessary technology.
【作者單位】： 中國科學院微電子研究所微電子器件與集成技術重點實驗室;
【基金】：國家科技重大專項資助項目(2016ZX02301001) 國家自然科學基金資助項目(61604172)
【分類號】：TN305.7
【相似文獻】
相關期刊論文 前1條
1 張小林;楊根慶;張宇寧;;SoC的可靠性和低功耗協(xié)同優(yōu)化[J];西南交通大學學報;2010年02期
相關博士學位論文 前1條
1 代國定;數(shù)�；旌想娐饭摹肼晠f(xié)同優(yōu)化設計方法研究[D];西安電子科技大學;2005年
相關碩士學位論文 前1條
1 凌景;3D NoC測試調(diào)度協(xié)同優(yōu)化研究[D];桂林電子科技大學;2016年
，本文編號：2205170
本文鏈接：http://sikaile.net/kejilunwen/dianzigongchenglunwen/2205170.html
教材專著
