基于FPGA的高速串行CMOS工業(yè)相機
發(fā)布時間：2018-08-24 10:54
【摘要】：高速接口的數(shù)字相機由于采用了成熟的計算機高速數(shù)據(jù)傳輸技術(shù),充分利用已有計算機資源,采用串行高速數(shù)據(jù)傳輸方式,將傳統(tǒng)的圖像采集卡省去,從而簡化連接電纜；在獲得高傳輸速率的同時,產(chǎn)品成本也大大降低,故成為眾多機器視覺系統(tǒng)的首選。論文分析了工業(yè)相機的基本框架,對幾種主控芯片的主流嵌入式方案行對比,簡單介紹了工業(yè)相機實現(xiàn)的基本技術(shù),并對圖像傳感器,外部存儲設(shè)備和外部接口芯片進行了選擇。最終本文選擇ONSEM Ⅰ公司的VITA-1300一款130萬CMOS作為本系統(tǒng)的前段圖像傳感器,Spartan-6的一款FPGA作為系統(tǒng)的主控核心,輸出接口選擇USB3.0輸出。在分析方案的基礎(chǔ)上論文還完整實現(xiàn)了這個方案的軟硬件系統(tǒng)設(shè)計,并進行測試和驗證。論文基于FPGA的高速串行工業(yè)相機系統(tǒng)的設(shè)計主要工作包括：1)硬件上采用Xilinx公司Spartan-6系列的高性能FPGA作為系統(tǒng)圖像采集處理核心,完成FPGA相關(guān)電路設(shè)計、DDR2電路設(shè)計、CMOS及外圍電路設(shè)計以及電源設(shè)計等,完成FPGA核心板和CMOS板的PCB設(shè)計工作。2)利用Verilog語言和ISE系統(tǒng)工具完成FPGA程序編寫和調(diào)試,主要功能包括數(shù)據(jù)接收、協(xié)議解析,數(shù)據(jù)緩存,CFA插值,數(shù)據(jù)空間轉(zhuǎn)換,圖形矯正等算法,良好地展示了FPGA優(yōu)秀的現(xiàn)場可編輯能力和流水線處理特性。3)系統(tǒng)地軟硬件測試,本系統(tǒng)可以高速采集1280*1024分辨率的圖像,幀頻可到150幀每秒。
[Abstract]:The digital camera with high speed interface adopts mature computer high speed data transmission technology, makes full use of existing computer resources, adopts serial high speed data transmission mode, saves the traditional image acquisition card, thus simplifies connecting cable; At the same time, the cost of the product is greatly reduced, so it becomes the first choice for many machine vision systems. This paper analyzes the basic frame of industrial camera, compares several mainstream embedded schemes of main control chip, briefly introduces the basic technology of industrial camera, and introduces the image sensor. External storage devices and external interface chips are selected. Finally, a 1.3 million CMOS of VITA-1300 of ONSEM I Company is chosen as the FPGA of Spartan-6 as the main control core of the system, and the output interface of USB3.0 is chosen as the output of the system. On the basis of the analysis of the scheme, the software and hardware system design of the scheme is implemented, tested and verified. In this paper, the design of the high-speed serial industrial camera system based on FPGA includes: 1) the high performance FPGA of Spartan-6 series of Xilinx company is used as the core of image acquisition and processing on the hardware. The design of FPGA related circuit and the design of peripheral circuit and power supply are completed. The PCB design of FPGA core board and CMOS board is completed. 2) the FPGA program is written and debugged by using Verilog language and ISE system tools. The main functions include data receiving, protocol parsing, data cache CFA interpolation, data space conversion, graphic correction and so on. The software and hardware tests of FPGA are well demonstrated. The system can collect 1280 1024 resolution images at high speed, and the frame rate can reach 150 frames per second.
【學(xué)位授予單位】：浙江大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2015
【分類號】：TP391.41;TN791
本文編號：2200595
[Abstract]:The digital camera with high speed interface adopts mature computer high speed data transmission technology, makes full use of existing computer resources, adopts serial high speed data transmission mode, saves the traditional image acquisition card, thus simplifies connecting cable; At the same time, the cost of the product is greatly reduced, so it becomes the first choice for many machine vision systems. This paper analyzes the basic frame of industrial camera, compares several mainstream embedded schemes of main control chip, briefly introduces the basic technology of industrial camera, and introduces the image sensor. External storage devices and external interface chips are selected. Finally, a 1.3 million CMOS of VITA-1300 of ONSEM I Company is chosen as the FPGA of Spartan-6 as the main control core of the system, and the output interface of USB3.0 is chosen as the output of the system. On the basis of the analysis of the scheme, the software and hardware system design of the scheme is implemented, tested and verified. In this paper, the design of the high-speed serial industrial camera system based on FPGA includes: 1) the high performance FPGA of Spartan-6 series of Xilinx company is used as the core of image acquisition and processing on the hardware. The design of FPGA related circuit and the design of peripheral circuit and power supply are completed. The PCB design of FPGA core board and CMOS board is completed. 2) the FPGA program is written and debugged by using Verilog language and ISE system tools. The main functions include data receiving, protocol parsing, data cache CFA interpolation, data space conversion, graphic correction and so on. The software and hardware tests of FPGA are well demonstrated. The system can collect 1280 1024 resolution images at high speed, and the frame rate can reach 150 frames per second.
【學(xué)位授予單位】：浙江大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2015
【分類號】：TP391.41;TN791
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，本文編號：2200595
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