【摘要】：隨著半導(dǎo)體工藝技術(shù)的持續(xù)改善,使得芯片的集成度、工作頻率、功耗等指標(biāo)參數(shù)不斷提高。但是特征尺寸的縮小也使得電路翻轉(zhuǎn)所需的臨界電荷降低,導(dǎo)致微控制器對(duì)內(nèi)部和外部環(huán)境變得更加敏感。另一方面,隨著微控制器廣泛應(yīng)用在航空航天等特殊應(yīng)用領(lǐng)域的苛刻任務(wù)中,要求微控制器需具有更高的可靠性。在太空環(huán)境中,微控制器很容易受到單粒子效應(yīng)的影響,使微控制器中的邏輯單元發(fā)生翻轉(zhuǎn)而產(chǎn)生故障,嚴(yán)重影響微控制器的可靠性。故障注入作為一種靈活方便、便宜有效的方法廣泛應(yīng)用于可靠性評(píng)估領(lǐng)域。在故障注入的實(shí)現(xiàn)中,常用的有基于物理的、仿真的或者FPGA的故障注入方法。為了自動(dòng)快速地分析微控制器對(duì)軟錯(cuò)誤的敏感性,該論文對(duì)基于FPGA的微控制器芯核軟錯(cuò)誤敏感性評(píng)估方法進(jìn)行了研究。首先,對(duì)微控制器故障注入方法的研究現(xiàn)狀、FPGA內(nèi)部結(jié)構(gòu)、以及開(kāi)發(fā)語(yǔ)言進(jìn)行簡(jiǎn)單介紹。其次,利用Verilog HDL對(duì)PIC16F54微控制器芯核進(jìn)行了設(shè)計(jì),包括取指、譯碼、ALU、寄存器組、堆棧以及ROM,并在FPGA開(kāi)發(fā)板上進(jìn)行驗(yàn)證。然后,利用該微控制器芯核作為實(shí)驗(yàn)對(duì)象,提出一種基于FPGA故障注入的微控制器敏感性評(píng)估方法。在FPGA芯片上同時(shí)運(yùn)行有故障和無(wú)故障的兩個(gè)微控制器,并充分利用FPGA的并行性,把故障注入控制、故障分類(lèi)、故障列表等模塊均在硬件上實(shí)現(xiàn)。自動(dòng)地完成全部存儲(chǔ)位的故障注入,并且能夠快速的對(duì)故障注入結(jié)果進(jìn)行分析。最后,注入大約30萬(wàn)個(gè)軟錯(cuò)誤,把敏感性結(jié)果與其他的方法相比較,驗(yàn)證本文方法的正確性。另有實(shí)驗(yàn)數(shù)據(jù)表明,使用該方法進(jìn)行故障注入及敏感性分析所需的時(shí)間比軟件仿真的方法提高了 4個(gè)數(shù)量級(jí)。
[Abstract]:With the continuous improvement of semiconductor technology, the chip integration, working frequency, power consumption and other parameters are constantly improved. However, the reduction of the characteristic size also reduces the critical charge required for the circuit to flip, which makes the microcontroller more sensitive to the internal and external environment. On the other hand, with the wide application of microcontrollers in the demanding tasks of special applications such as aerospace, microcontrollers are required to have higher reliability. In the space environment, the microcontroller is easily affected by the single particle effect, which causes the logic unit in the microcontroller to flip and causes the fault, which seriously affects the reliability of the microcontroller. As a flexible, cheap and effective method, fault injection is widely used in the field of reliability evaluation. In the implementation of fault injection, there are physical, simulation or FPGA based fault injection methods. In order to analyze the sensitivity of microcontroller to soft error automatically and quickly, this paper studies the sensitivity evaluation method of core soft error based on FPGA. Firstly, the internal structure of FPGA and the development language are briefly introduced. Secondly, the core of PIC16F54 microcontroller is designed by using Verilog HDL, including the reference, decoding Alu, register group, stack and rom, and verified on the FPGA development board. Then, using the core of the microcontroller as the experimental object, a sensitivity evaluation method of the microcontroller based on FPGA fault injection is proposed. Two microcontrollers with and without faults are run on FPGA chip at the same time, and taking full advantage of the parallelism of FPGA, the modules of fault injection control, fault classification and fault list are implemented in hardware. The fault injection of all storage bits is completed automatically, and the fault injection results can be analyzed quickly. Finally, about 300,000 soft errors are injected, and the sensitivity results are compared with other methods to verify the correctness of the proposed method. Other experimental data show that the time required for fault injection and sensitivity analysis using this method is 4 orders of magnitude higher than that of software simulation.
【學(xué)位授予單位】：合肥工業(yè)大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2017
【分類(lèi)號(hào)】：TN791

【參考文獻(xiàn)】

相關(guān)期刊論文 前6條

1 黃正峰;錢(qián)棟良;梁華國(guó);易茂祥;歐陽(yáng)一鳴;閆愛(ài)斌;;65nm工藝下單粒子加固鎖存器設(shè)計(jì)[J];計(jì)算機(jī)輔助設(shè)計(jì)與圖形學(xué)學(xué)報(bào);2016年08期

2 黃正峰;陳凡;蔣翠云;梁華國(guó);;基于時(shí)序優(yōu)先的電路容錯(cuò)混合加固方案[J];電子與信息學(xué)報(bào);2014年01期

3 武振平;付方發(fā);肖立伊;;基于VHDL故障注入的處理器敏感性分析[J];微電子學(xué)與計(jì)算機(jī);2012年10期

4 黃海林;唐志敏;許彤;;龍芯1號(hào)處理器的故障注入方法與軟錯(cuò)誤敏感性分析[J];計(jì)算機(jī)研究與發(fā)展;2006年10期

5 董劍,曲峰,劉宏偉,崔剛;嵌入式故障注入器HFI-4的研究與設(shè)計(jì)[J];小型微型計(jì)算機(jī)系統(tǒng);2003年12期

6 孫峻朝,王建瑩,楊孝宗;故障注入方法與工具的研究現(xiàn)狀[J];宇航學(xué)報(bào);2001年01期

相關(guān)博士學(xué)位論文 前1條

1 周婉婷;輻照環(huán)境中通信數(shù)字集成電路軟錯(cuò)誤預(yù)測(cè)建模研究[D];電子科技大學(xué);2014年

相關(guān)碩士學(xué)位論文 前4條

1 洪映森;基于FPGA的故障注入系統(tǒng)研究[D];哈爾濱工業(yè)大學(xué);2014年

2 江麗君;數(shù)字集成電路故障模型研究及故障注入平臺(tái)設(shè)計(jì)[D];哈爾濱工業(yè)大學(xué);2013年

3 吳杰;基于VHDL的故障注入工具的研究與實(shí)現(xiàn)[D];哈爾濱工業(yè)大學(xué);2013年

4 路遙;基于HDL的故障注入工具的研究與實(shí)現(xiàn)[D];國(guó)防科學(xué)技術(shù)大學(xué);2008年

，

本文編號(hào)：2183383