基于FPGA的一種數(shù)字下變頻設計
發(fā)布時間：2018-07-15 18:26
【摘要】：隨著科學的進步,社會的發(fā)展,軟件無線電這一概念也隨著科技的進步而誕生。在軟件無線電中,其主要的通信功能是由軟件提供和實現(xiàn)的,硬件只是提供一個基本平臺,硬件設備不會隨著通信系統(tǒng)的發(fā)展而淘汰不需要要逐步更新,并不像傳統(tǒng)通信設備,讓軟件僅僅作為無線通信的基本平臺,讓硬件起主導作用。但是,由于目前硬件水平的限制,DSP處理器不能直接處理從A/D采樣而來數(shù)據(jù),所以數(shù)字下變頻是目前軟件無線電不可缺少的一部分。在21世紀的今天,可編程邏輯器件已經(jīng)發(fā)展到一個相當成熟的地步,這其中FPGA(現(xiàn)場可編程門陣列)屬于發(fā)展的相當最完善的。所以現(xiàn)在電子電路的設計基本是基于FPGA的。采用FPGA設計數(shù)字下變頻也十分便利。本文首先對數(shù)字下變頻的基礎理論:采樣理論和多速率數(shù)字信號處理理論進行介紹和研究,對NCO的生成算法進行比較和其性能的優(yōu)劣,著重介紹了CORDIC算法的特點和其優(yōu)勢。然后對基于FPGA的數(shù)字下變頻的各模塊:NCO(數(shù)字控制振蕩器)、CIC(積分梳狀濾波器)、HBF(半帶濾波器)、FIR低通濾波器分別進行研究其理論、結構、及實現(xiàn)方法,在設計過程中通過調用Modelsim對各個模塊進行仿真調試,用Matlab做頻譜分析以使其達到設計要求。最后通過本設計所用的Altera的EP4CE15F17C8的芯片和AD公司推出的AD9280芯片再配合Matlab的FDAtool工具設計生成一個輸入信號在0.1-0.4MHz采樣頻率為32MHz的數(shù)字下變頻器,通過頻譜儀和信號發(fā)生器對其做板級測試。
[Abstract]:With the development of science and society, the concept of software radio was born with the progress of science and technology. In software radio, its main communication function is provided and realized by software. Hardware only provides a basic platform, and hardware equipment will not be phased out with the development of communication system. It is not like traditional communication equipment. Let the software only as the basic platform of wireless communication, let the hardware play a leading role. However, due to the limitation of current hardware level, DSP processor can not directly process data sampled from A / D, so digital downconversion is an indispensable part of software radio at present. In the 21st century, programmable logic devices have been developed to a rather mature stage, in which FPGA (Field Programmable Gate Array) belongs to the most perfect development. So now the design of electronic circuit is based on FPGA. Using FPGA to design digital downconversion is also very convenient. This paper first introduces and studies the basic theory of digital down-conversion: sampling theory and multi-rate digital signal processing theory, compares the generation algorithm of NCO and its performance, and emphatically introduces the characteristics and advantages of Cordic algorithm. Then, the theory, structure and implementation method of every module of digital down-conversion based on FPGA are studied, such as: NCO (Digital controlled oscillator) CIC (integral comb filter) / HBF (half Band filter) / Fir low pass filter. In the design process, each module is simulated and debugged by calling Modelsim, and the spectrum analysis is done by Matlab to make it meet the design requirements. Finally, the EP4CE15F17C8 chip of Altera and AD9280 chip developed by AD Company are used in this design to generate a digital downconverter with input signal sampling frequency of 32MHz at 0.1-0.4MHz. It is tested at board level by spectrometer and signal generator.
【學位授予單位】：南京郵電大學
【學位級別】：碩士
【學位授予年份】：2017
【分類號】：TN791
本文編號：2124991
[Abstract]:With the development of science and society, the concept of software radio was born with the progress of science and technology. In software radio, its main communication function is provided and realized by software. Hardware only provides a basic platform, and hardware equipment will not be phased out with the development of communication system. It is not like traditional communication equipment. Let the software only as the basic platform of wireless communication, let the hardware play a leading role. However, due to the limitation of current hardware level, DSP processor can not directly process data sampled from A / D, so digital downconversion is an indispensable part of software radio at present. In the 21st century, programmable logic devices have been developed to a rather mature stage, in which FPGA (Field Programmable Gate Array) belongs to the most perfect development. So now the design of electronic circuit is based on FPGA. Using FPGA to design digital downconversion is also very convenient. This paper first introduces and studies the basic theory of digital down-conversion: sampling theory and multi-rate digital signal processing theory, compares the generation algorithm of NCO and its performance, and emphatically introduces the characteristics and advantages of Cordic algorithm. Then, the theory, structure and implementation method of every module of digital down-conversion based on FPGA are studied, such as: NCO (Digital controlled oscillator) CIC (integral comb filter) / HBF (half Band filter) / Fir low pass filter. In the design process, each module is simulated and debugged by calling Modelsim, and the spectrum analysis is done by Matlab to make it meet the design requirements. Finally, the EP4CE15F17C8 chip of Altera and AD9280 chip developed by AD Company are used in this design to generate a digital downconverter with input signal sampling frequency of 32MHz at 0.1-0.4MHz. It is tested at board level by spectrometer and signal generator.
【學位授予單位】：南京郵電大學
【學位級別】：碩士
【學位授予年份】：2017
【分類號】：TN791
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相關期刊論文 前3條
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2 郝金光;馮宇;邱相艷;;Hogenauer CIC濾波器的算法研究及FPGA設計實現(xiàn)[J];電子元器件應用;2006年07期
3 賈雪琴;李強;王旭;李景宏;;用MATLAB在FPGA芯片中實現(xiàn)數(shù)字下變頻設計[J];計算機仿真;2005年12期
，本文編號：2124991
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