本文選題：VDMOS + 抗輻射　； 參考：《東南大學(xué)》2015年碩士論文

【摘要】：隨著信息技術(shù)產(chǎn)業(yè)的迅猛發(fā)展,功率器件可靠性和抗惡劣環(huán)境能力已然成為現(xiàn)代化軍事及航空航天等領(lǐng)域的重要研究課題�？馆椛浼庸唐骷牡托枨罅颗c工藝線特殊性致使其電學(xué)性能落后于同時(shí)代商業(yè)產(chǎn)品。因此,研究功率器件的輻射效應(yīng)并設(shè)計(jì)與現(xiàn)代化生產(chǎn)線兼容的抗輻射器件生產(chǎn)工藝流程意義重大。本文首先在VDMOS基本結(jié)構(gòu)與工藝流程研究的基礎(chǔ)上,針對(duì)器件不同工作狀態(tài)分析了相應(yīng)的物理模型,討論了VDMOS擊穿電壓、閾值電壓和導(dǎo)通電阻的計(jì)算方法,并簡(jiǎn)要探討了場(chǎng)限環(huán)和場(chǎng)板在終端結(jié)構(gòu)中的應(yīng)用。其次,在SEB輻射效應(yīng)的一維分析模型和二維數(shù)值仿真模型基礎(chǔ)上,討論了CIA效應(yīng)與三極管擊穿特性的關(guān)系。綜合考慮VDMOS的寄生三極管及CIA電流放大系數(shù),提出了擬光觸發(fā)晶閘管模型與新的SEB臨界條件。利用仿真軟件MEDICI驗(yàn)證了SEB的電壓特性與位置關(guān)系,得出了器件的SEB敏感區(qū)域?yàn)闇系琅c外延層邊界,并指出了頸區(qū)的特殊性�；陬i區(qū)附近SEB電流響應(yīng)中由柵漏電流引起的SEB塌陷現(xiàn)象,提出了全新的柵致單粒子燒毀(SEGIB)模型,解釋了傳統(tǒng)SEB效應(yīng)與柵漏電流對(duì)該區(qū)域SEB現(xiàn)象的共同影響,并用因子γSG表征這一影響的大小。然后,在原有SEB數(shù)值仿真判定模型基礎(chǔ)上,提出了新的SEB復(fù)合判定法,將器件的SEB電流響應(yīng)與擊穿特性相結(jié)合,利用交點(diǎn)電壓精確判定抗輻射能力。對(duì)這種復(fù)合判定法進(jìn)一步優(yōu)化后,結(jié)合器件輻射敏感區(qū)域,提出了SOLA點(diǎn)與S參數(shù)以表征器件的SEB加固能力的方法,并用此方法對(duì)常見輻射加固措施進(jìn)行研究,發(fā)現(xiàn)局部SOI與溝槽結(jié)構(gòu)抗SEB能力較好,超結(jié)結(jié)構(gòu)無明顯作用,梯度外延與P+擴(kuò)散有一定效果。最后,基于指標(biāo)要求設(shè)計(jì)了VDMOS的尺寸與工藝,選擇后柵工藝、梯度外延、P-擴(kuò)散作為兼容現(xiàn)有生產(chǎn)工藝的抗輻射加固措施,并繪制版圖。仿真結(jié)果顯示該器件擊穿電壓155V,閾值電壓3.2V,額定電流大于20A,導(dǎo)通電阻0.05 Ω并有較好的抗輻射能力,滿足設(shè)計(jì)要求。
[Abstract]:With the rapid development of information technology industry, the reliability of power devices and the ability to resist adverse environment have become an important research topic in modern military, aerospace and other fields. The low demand for radiation hardening devices and the particularity of the process line make their electrical properties lag behind the commercial products of the same era. Therefore, it is of great significance to study the radiation effect of power devices and design the production process of anti-radiation devices compatible with modern production line. Based on the research of VDMOS basic structure and process flow, the physical models of VDMOS are analyzed in different working states, and the calculation methods of breakdown voltage, threshold voltage and on-resistance are discussed. The application of field limiting ring and field plate in terminal structure is briefly discussed. Secondly, based on the one-dimensional analysis model and two-dimensional numerical simulation model of SEB radiation effect, the relationship between the CIA effect and the breakdown characteristics of the transistor is discussed. Considering the parasitic transistor and CIA current magnification factor of VDMOS, a quasi-light-triggered thyristor model and a new SEB critical condition are proposed. The relationship between the voltage characteristics and the position of SEB is verified by the simulation software Medici. The sensitive region of SEB is found to be the boundary of channel and epitaxial layer, and the particularity of the neck region is pointed out. Based on the SEB collapse caused by gate leakage current in the SEB current response near the neck region, a new gate induced single particle burn (SEGIB) model is proposed, which explains the joint effect of the traditional SEB effect and the gate leakage current on the SEB phenomenon in this region. The effect was characterized by factor 緯 SG. Then, based on the original SEB numerical simulation decision model, a new SEB compound decision method is proposed, which combines the current response of the SEB device with the breakdown characteristics, and uses the intersection voltage to accurately determine the anti-radiation ability. After further optimization of the composite decision method, a new method of Sola point and S parameter is proposed to characterize the SEB reinforcement ability of the device, and the common radiation reinforcement measures are studied by using this method, which combines the radiation sensitive region of the device with the SOLA point and the S parameter to characterize the SEB reinforcement ability of the device. It is found that the local SOI and grooved structure have better anti-SEB ability, but the superjunction structure has no obvious effect. Gradient epitaxy and P-diffusion have some effect. Finally, the size and process of VDMOS are designed based on the index requirements. The back gate process and gradient epitaxial P- diffusion are selected as the anti-radiation reinforcement measures compatible with the existing production process, and the layout is drawn. The simulation results show that the device has a breakdown voltage of 155V, a threshold voltage of 3.2V, a rated current of more than 20A, a on-resistance of 0.05 惟 and a good radiation resistance, which meets the design requirements.
【學(xué)位授予單位】：東南大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：TN386

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