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硅基片上射頻集成無(wú)源器件的去嵌入表征方法研究

發(fā)布時(shí)間:2018-06-28 05:23

  本文選題:無(wú)源器件 + 共面波導(dǎo)。 參考:《電子元件與材料》2016年03期


【摘要】:硅基片上射頻集成無(wú)源器件進(jìn)行S參數(shù)測(cè)試時(shí)不可避免受到焊盤寄生效應(yīng)的影響。針對(duì)這一問(wèn)題,提取了三組不同長(zhǎng)度硅基共面波導(dǎo)型傳輸線的S參數(shù),基于級(jí)聯(lián)理論的三種去嵌入方法被用于傳輸線模型分布參數(shù)的精確表征,并結(jié)合電磁仿真綜合對(duì)比。結(jié)果表明:相對(duì)于其他兩種常用去嵌入方法,"混合"法得到的S參數(shù)曲線與無(wú)焊盤仿真最為接近(平均偏差S_(11)≤3.392%,S_(21)≤5.184%),且削弱了去嵌入過(guò)程中測(cè)量誤差的影響,有效減少了分布參數(shù)曲線波動(dòng)。
[Abstract]:The S parameters of RF integrated passive devices on silicon substrate are inevitably affected by the parasitic effect of solder pad. In order to solve this problem, three sets of S parameters of coplanar waveguide transmission lines with different lengths are extracted. The three desembling methods based on cascade theory are used to characterize the distribution parameters of transmission line model accurately and compared with electromagnetic simulation. The results show that the S parameter curve obtained by the "hybrid" method is the closest to the non-pad simulation (the average deviation S _ (11) 鈮,

本文編號(hào):2076912

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