發(fā)布時(shí)間：2018-06-23 22:08

  本文選題：數(shù)據(jù)采集 + FPGA��； 參考：《山東大學(xué)》2015年碩士論文

【摘要】：在現(xiàn)代數(shù)據(jù)處理和通信中,FPGA芯片已經(jīng)被廣泛使用,隨著FPGA芯片的集成度越來越高,目前已經(jīng)集成了ARM、 DSP等硬核,再結(jié)合FPGA在并行處理、實(shí)時(shí)性和低功耗的優(yōu)勢(shì),FPGA會(huì)在應(yīng)用前景會(huì)更加廣闊。本論文從硬件和軟件兩大部分詳細(xì)描述了整個(gè)系統(tǒng)的設(shè)計(jì)與實(shí)現(xiàn),硬件系統(tǒng)部分主要是對(duì)基于FPGA各個(gè)硬件模塊的原理圖設(shè)計(jì)進(jìn)行了詳細(xì)的說明,完成了系統(tǒng)硬件電路板PCB的設(shè)計(jì)與調(diào)試；軟件部分主要是從數(shù)據(jù)采集、內(nèi)部通信和外部組網(wǎng)通信三個(gè)部分闡述了具體的實(shí)現(xiàn),包括原理的設(shè)計(jì)、FPGA程序的開發(fā)、網(wǎng)絡(luò)拓?fù)涞膶?shí)現(xiàn)等。本論文主要一方面解決的是數(shù)據(jù)采集的問題,主要是如何通過FPGA實(shí)現(xiàn)數(shù)字、模擬信號(hào)的采集,并對(duì)不同的信號(hào)采用不同的隔離措施,屏蔽相應(yīng)的干擾。本論文另一方面解決的是通信問題,主要是集成了FPGA和ARM核的SoC芯片內(nèi)部通信問題和外部通信組網(wǎng)的問題。SoC芯片內(nèi)部通信問題,主要是如何使用Avalon這一內(nèi)部總線,包括Avalon總線的配置、HPS的啟動(dòng)流程和FPGA內(nèi)部通信模塊的設(shè)計(jì)。系統(tǒng)間組網(wǎng)通信主要是如何采用冗余的光纖通信實(shí)現(xiàn)主備鏈路協(xié)議制定與切換�；诖嗽O(shè)計(jì)的數(shù)據(jù)采集與通信系統(tǒng),不僅具有高實(shí)時(shí)性、并行處理的能力,而且簡(jiǎn)化了硬件了電路的復(fù)雜度,提高了系統(tǒng)的可靠性,為相關(guān)項(xiàng)目提供了新的設(shè)計(jì)思路。
[Abstract]:FPGA chips have been widely used in modern data processing and communication. With the increasing integration of FPGA chips, ARM, DSP and other hard cores have been integrated, and then combined with FPGA in parallel processing. The advantages of real-time and low-power FPGA will be more widely used. This paper describes the design and implementation of the whole system in detail from two parts of hardware and software. The hardware system mainly describes the schematic design of each hardware module based on FPGA. The hardware PCB of the system is designed and debugged, the software part mainly elaborates the realization from three parts: data acquisition, internal communication and external networking communication, including the development of FPGA program. The realization of network topology and so on. On the one hand, this paper mainly solves the problem of data acquisition, mainly how to realize the acquisition of digital and analog signals by FPGA, and how to use different isolation measures to shield the corresponding interference. On the other hand, this paper solves the problem of communication, mainly the internal communication problem of the SoC chip integrated with FPGA and arm core and the problem of external communication networking. The main problem is how to use the internal bus of Avalon. It includes the configuration of Avalon bus and the design of internal communication module. How to use redundant optical fiber communication to establish and switch the main and backup link protocols is the main method of inter-system network communication. The data acquisition and communication system based on this design not only has the ability of high real-time and parallel processing, but also simplifies the complexity of the hardware circuit, improves the reliability of the system, and provides a new design idea for the related projects.
【學(xué)位授予單位】：山東大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：TP274.2;TN791

【參考文獻(xiàn)】

相關(guān)期刊論文 前1條

1 黃遠(yuǎn)望;嚴(yán)濟(jì)鴻;周偉;;基于FPGA的數(shù)據(jù)采集測(cè)試系統(tǒng)設(shè)計(jì)[J];現(xiàn)代雷達(dá);2015年04期

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本文編號(hào)：2058606