本文選題：三維集成 + 電容-電壓曲線��； 參考：《南京郵電大學(xué)》2017年碩士論文

【摘要】：三維集成是當(dāng)前集成電路技術(shù)發(fā)展方向之一,而疊層鍵合結(jié)構(gòu)是三維集成技術(shù)的基本結(jié)構(gòu),研究其檢測(cè)和表征技術(shù)具有重要科學(xué)意義和實(shí)用價(jià)值。為此,本文在深入研究疊層鍵合結(jié)構(gòu)電容-電壓特性的基礎(chǔ)上,提出了一種非破壞性參數(shù)提取方法,并通過(guò)數(shù)值模擬和實(shí)驗(yàn)進(jìn)行了驗(yàn)證。其主要工作包括:第一,建立了MIS結(jié)構(gòu)精確的低頻和高頻電容-電壓模型。在理想結(jié)構(gòu)基本模型基礎(chǔ)上,對(duì)襯底表面勢(shì)、反型條件和弱反型區(qū)表達(dá)式進(jìn)行了校準(zhǔn),使其解析結(jié)果相對(duì)數(shù)值結(jié)果的精確度提高到了99%以上,并在此基礎(chǔ)上研究了界面態(tài)對(duì)MIS結(jié)構(gòu)電容-電壓特性的影響。第二,建立了理想疊層鍵合結(jié)構(gòu)的低頻和高頻電容-電壓模型�；贛IS結(jié)構(gòu)精確電容-電壓模型,推導(dǎo)了不同摻雜類型的理想疊層鍵合結(jié)構(gòu)的低頻和高頻電容-電壓關(guān)系表達(dá)式,并利用二維半導(dǎo)體器件仿真軟件MEDICI進(jìn)行了數(shù)值模擬驗(yàn)證。結(jié)果表明解析結(jié)果和數(shù)值結(jié)果吻合良好。進(jìn)而為了探討該結(jié)構(gòu)電容-電壓特性的物理本質(zhì),深入研究了空間電荷層、半導(dǎo)體表面勢(shì)以及金屬層電勢(shì)隨外加電壓的變化關(guān)系,以及半導(dǎo)體摻雜濃度、絕緣層厚度等結(jié)構(gòu)參數(shù)對(duì)其電容-電壓特性的影響。第三,建立了實(shí)際疊層鍵合結(jié)構(gòu)的低頻和高頻電容-電壓模型。通過(guò)考慮金屬與半導(dǎo)體功函數(shù)差、絕緣層固定電荷、界面態(tài)等因素,對(duì)疊層鍵合結(jié)構(gòu)的低頻和高頻電容-電壓關(guān)系表達(dá)式進(jìn)行了修正。結(jié)果表明實(shí)際疊層鍵合結(jié)構(gòu)的電容-電壓模型呈現(xiàn)出高度的復(fù)雜性,不同的半導(dǎo)體表面勢(shì)狀態(tài)可導(dǎo)致四種不同形態(tài)的電容-電壓曲線,本文對(duì)其機(jī)理進(jìn)行了分析,并利用二維數(shù)值模擬進(jìn)行了驗(yàn)證。第四,提出了一種利用電容-電壓法無(wú)損提取疊層鍵合結(jié)構(gòu)參數(shù)的方法�；谏鲜瞿Ｐ臀覀兝玫皖l和高頻的飽和值分別提取絕緣層厚度和半導(dǎo)體摻雜濃度,利用低頻曲線的零點(diǎn)和特征點(diǎn)提取絕緣層固定電荷,利用參數(shù)識(shí)別的方法提取界面態(tài)密度。數(shù)值模擬表明所得到的提取值與理論值的相對(duì)誤差基本都在6%以下,證明了提取方法簡(jiǎn)單且準(zhǔn)確。第五,研制了MIS結(jié)構(gòu)和疊層鍵合結(jié)構(gòu),并進(jìn)行了參數(shù)提取。利用氧化、淀積等手段,制備了以銅為金屬層的MIS結(jié)構(gòu),進(jìn)而利用銅銅鍵合技術(shù),將兩片MIS結(jié)構(gòu)背靠背鍵合,從而得到疊層鍵合結(jié)構(gòu)。而后對(duì)兩種結(jié)構(gòu)的樣品進(jìn)行了SEM測(cè)試和高頻電壓-電容特性測(cè)試,并利用前述提取方法,成功地提取了樣品的相關(guān)物理參數(shù),證實(shí)了模型和理論的正確性和實(shí)用性。本文的工作為評(píng)估三維集成疊層鍵合結(jié)構(gòu)的可靠性提供了一種非破壞性的表征方法,簡(jiǎn)單方便、成本低廉、且精度高,具有重要的工程價(jià)值和實(shí)際意義。
[Abstract]:3D integration is one of the development directions of IC technology, and laminated bonding structure is the basic structure of 3D integration technology. It is of great scientific significance and practical value to study the detection and characterization technology. Therefore, based on the in-depth study of capacitance-voltage characteristics of laminated bonding structures, a non-destructive parameter extraction method is proposed, which is verified by numerical simulation and experiments. The main works are as follows: first, the accurate models of low frequency and high frequency capacitances-voltage of MIS structure are established. Based on the basic model of ideal structure, the surface potential, inversion condition and weak inversion region expressions of substrate are calibrated, and the accuracy of analytical results relative to numerical results is improved to more than 99%. On this basis, the influence of interface state on the capacitance-voltage characteristics of MIS structure is studied. Secondly, the low frequency and high frequency capacitance-voltage models of ideal laminated bonding structures are established. Based on the exact capacitance-voltage model of MIS structure, the expressions of low-frequency and high-frequency capacitance-voltage relationships of ideal laminated bonding structures with different doping types are derived, and the simulation results are verified by the two-dimensional semiconductor device simulation software MEDICI. The results show that the analytical results are in good agreement with the numerical results. In order to study the physical nature of the capacitance-voltage characteristics of the structure, the relationship between the space charge layer, the surface potential of the semiconductor and the potential of the metal layer with the applied voltage, as well as the doping concentration of the semiconductor, are studied. The influence of insulation thickness and other structural parameters on the capacitance-voltage characteristics. Thirdly, the low-frequency and high-frequency capacitance-voltage models of practical laminated bonding structures are established. By taking into account the difference of work function between metal and semiconductor, the fixed charge of insulating layer and the interface state, the expressions of low-frequency and high-frequency capacitance-voltage relationships of laminated bonding structures are modified. The results show that the capacitance-voltage model of the actual laminated structure presents a high degree of complexity. Different surface potential states of semiconductors can lead to four different types of capacitance-voltage curves. The mechanism is analyzed in this paper. It is verified by two-dimensional numerical simulation. Fourthly, a method of nondestructive extraction of laminated structure parameters by capacitance-voltage method is proposed. Based on the above model, the thickness of insulation layer and the concentration of semiconductor doping are extracted from the saturation values of low frequency and high frequency, respectively. The zero and characteristic points of low frequency curve are used to extract the fixed charge of insulation layer, and the density of interfacial states is extracted by parameter identification. Numerical simulation shows that the relative error between the extracted value and the theoretical value is less than 6%, which proves that the extraction method is simple and accurate. Fifthly, MIS structure and laminated bonding structure are developed, and parameters are extracted. By means of oxidation and deposition, the MIS structure with copper as metal layer was prepared, and then two pieces of MIS structure were bonded back to back by copper bonding technology, and the laminated bonding structure was obtained. Then the samples with two structures were tested by SEM and the characteristics of high-frequency voltage-capacitance. The physical parameters of the samples were extracted successfully by using the above extraction method. The correctness and practicability of the model and theory were verified. The work in this paper provides a nondestructive representation method for evaluating the reliability of 3D integrated laminated bonding structures. It is simple, convenient, low cost and high precision. It has important engineering value and practical significance.
【學(xué)位授予單位】：南京郵電大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2017
【分類號(hào)】：TN407

【參考文獻(xiàn)】

相關(guān)期刊論文 前8條

1 李科成;劉孝剛;陳明祥;;用于三維封裝的銅-銅低溫鍵合技術(shù)進(jìn)展[J];電子元件與材料;2015年01期

2 吳際;謝冬青;;三維集成技術(shù)的現(xiàn)狀和發(fā)展趨勢(shì)[J];現(xiàn)代電子技術(shù);2014年06期

3 田芳;;晶圓疊層3D封裝中晶圓鍵合技術(shù)的應(yīng)用[J];電子工業(yè)專用設(shè)備;2013年01期

4 朱健;;3D堆疊技術(shù)及TSV技術(shù)[J];固體電子學(xué)研究與進(jìn)展;2012年01期

5 趙璋;童志義;;3D-TSV技術(shù)——延續(xù)摩爾定律的有效通途[J];電子工業(yè)專用設(shè)備;2011年03期

6 鄧丹;吳豐順;周龍?jiān)?劉輝;安兵;吳懿平;;3D封裝及其最新研究進(jìn)展[J];微納電子技術(shù);2010年07期

7 謝正生;吳惠楨;勞燕鋒;劉成;曹萌;;金屬鍵合技術(shù)及其在光電器件中的應(yīng)用[J];激光與光電子學(xué)進(jìn)展;2007年01期

8 朱國(guó)良,張鶴鳴,胡輝勇,李發(fā)寧,舒斌;三維CMOS集成電路技術(shù)研究[J];電子科技;2004年07期

，

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