碳基場效應管的隧穿電流及其對邏輯電路的影響
發(fā)布時間:2018-06-14 23:33
本文選題:碳納米管 + 石墨烯 ; 參考:《南京郵電大學》2015年碩士論文
【摘要】:首先,采用一種量子力學模型研究納米碳基場效應管電流特性,該模型基于二維NEGF(非平衡格林函數)方程和Poisson方程自洽全量子數值解。結合器件的工作原理,研究基于柵工程和溝道工程技術的碳基場效應管輸運特性。其次,在器件電學特性研究的基礎上,將研究范圍擴展至電路,分析采用柵工程和溝道工程碳基場效應晶體管構建的電路性能。最后,研究場效應晶體管柵極隧穿電流對與門電路邏輯操作的影響。主要研究內容如下:(1)研究基于溝道工程和柵工程技術構建納米碳基場效應管的輸運特性;诙囿w量子NEGF方法,研究了異質柵和溝道輕摻雜納米碳基器件的溝道電流特性,研究結果表明,碳基器件具有與一般場效應管類似的共性:如柵長減小,DIBL效應增大;柵氧厚度的減小能提高器件亞閾特性。與普通單柵相比,異質柵結合溝道輕摻雜器件不僅具有更優(yōu)的柵控能力,能更好地抑制短溝道效應,具有更低的泄漏電流、更高的電流開關比。另外,在量子輸運模型基礎上,討論碳基器件載流子輸運特性,探索接近最終縮小極限的器件設計理論問題,并以國際半導體技術發(fā)展指南(ITRS’10)提出的2016-2024年晶體管指標為目標參量,進行新器件結構的工程設計優(yōu)化。(2)在器件電學特性的基礎上,基于Verilog-A查找表模型,利用HSPICE分析幾種新型結構器件所構建電路,包括基于異質柵結合溝道輕摻雜CNTFET反相器(LHCINV)和6管的靜態(tài)隨機存儲器(LHCSRAMs)的電學特性。結果表明,LHCINV具有較低的上升和下降延遲,較低的功耗和功耗延遲積(PDP)。LHCSRAMs具有較低的寫數據延遲,較低的功耗和PDP。(3)利用薛定諤方程求解場效應管的柵極隧穿電流,利用查找表模型的HSPICE分析發(fā)現,器件氧化層柵極隧穿電流會對電路的邏輯功能產生影響,導致電路邏輯操作失誤。
[Abstract]:First of all, a quantum mechanical model is used to study the current characteristics of nanocrystalline carbon based FET. The model is based on two-dimensional NEGF (nonequilibrium Green function) equation and Poisson equation self-consistent full quantum numerical solution. The transport characteristics of carbon based FET based on gate engineering and channel engineering are studied based on the principle of the device. Secondly, on the basis of the study of the electrical properties of the devices, the research scope is extended to the circuit, and the circuit performance is analyzed by using the gate engineering and channel engineering carbon-based field-effect transistors. Finally, the effect of gate tunneling current on gate logic operation is studied. The main research contents are as follows: (1) the transport characteristics of nanocrystalline carbon based FET based on channel engineering and gate engineering are studied. Based on the multibody quantum NEGF method, the channel current characteristics of nanocrystalline carbon based devices doped with heterogate and channel are studied. The results show that the carbon based devices have similar commonness with the conventional FET, such as the increase of DIBL effect when the gate length is reduced. The decrease of gate oxygen thickness can improve the subthreshold characteristics of the device. Compared with the conventional single-gate heterogate and channel light-doped devices not only have better gate control ability but also can suppress the short-channel effect better and have lower leakage current and higher current-to-switch ratio. In addition, based on the quantum transport model, the carrier transport characteristics of carbon-based devices are discussed, and the theoretical problems of device design near the ultimate reduction limit are explored. Taking the transistor index 2016-2024 proposed by ITRS10) as the target parameter, the engineering design optimization of the new device structure is carried out. Based on the electrical characteristics of the device, the model of Verilog-A lookup table is used to optimize the structure of the new device, which is based on the Verilog-A lookup table model. HSpice is used to analyze the electrical characteristics of several novel circuits, including LHCINV based on heterogate and light-doped CNTFET inverter, and LHCSRAMsbased on 6-transistor static random access memory (SRAM). The results show that LHCINV has lower rise and fall delay, lower power consumption and power delay product PDPU. LHCSRAMs have lower write data delay, lower power consumption and PDP.P3) using Schrodinger equation to solve the gate tunneling current of FET. By using the HSpice analysis of the lookup table model, it is found that the gate tunneling current of the oxide layer of the device will affect the logic function of the circuit and lead to the circuit logic operation error.
【學位授予單位】:南京郵電大學
【學位級別】:碩士
【學位授予年份】:2015
【分類號】:TN386
【參考文獻】
相關期刊論文 前1條
1 王偉;高健;張婷;張露;李娜;楊曉;岳工舒;;三材料線性摻雜石墨烯納米條帶場效應管性能(英文)[J];計算物理;2015年01期
,本文編號:2019462
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