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硬X射線低能探測器FPGA仿真測試與數(shù)據(jù)傳輸系統(tǒng)的研制

發(fā)布時間:2018-06-13 03:05

  本文選題:FPGA + 數(shù)據(jù)傳輸系統(tǒng); 參考:《云南大學(xué)》2015年碩士論文


【摘要】:硬X射線調(diào)制望遠鏡(HXMT)是我國自主研發(fā)的用于外星系X射線波段信息探測的空間望遠鏡,采用X射線低能段、中能段和高能段的信號直接調(diào)制成像。本文針對低能探測器的機箱和電控箱的各模塊軟件的功能進行了仿真測試研究。同時,研制了專門的數(shù)據(jù)傳輸系統(tǒng),用于在探測器機箱研制階段進行數(shù)據(jù)傳輸。所進行的工作和結(jié)果如下: 1、對低能探測器的機箱與電控箱的FPGA程序進行了全面軟件測評。測試平臺為Libero IDE9.1及內(nèi)置的Modelsim仿真軟件。測試結(jié)果表明軟件功能基本符合要求。探測器機箱主要功能為采集CCD事例數(shù)據(jù)、配置DAC與探測器驅(qū)動以及配置工作參數(shù)等。而電控箱主要功能為接收探測器數(shù)據(jù)并整理上傳、接收指令并注入探測器機箱等。經(jīng)測試發(fā)現(xiàn)探測器機箱的配置探測器驅(qū)動的配置時序不符合要求。分析研究后給出了修改方案,經(jīng)修改后的軟件配置驅(qū)動功能符合要求。 2、設(shè)計了數(shù)據(jù)傳輸系統(tǒng)的硬件模塊與軟件模塊。硬件方面,電路采用FPGA作為主控芯片,由于FPGA的并行處理特性,系統(tǒng)實現(xiàn)了高速處理能力。為了保障信號傳輸?shù)母呖煽啃?采用低電壓差分信號(Low-Voltage Differential Signaling, LVDS)傳輸模式作為與探測器機箱通信的方式,這是由于LVDS具有這種具有共模抑制能力的I/O技術(shù),可實現(xiàn)高噪聲抑制能力。軟件方面,程序采用VHDL硬件描述語言編寫,實現(xiàn)了能量事例數(shù)據(jù)及狀態(tài)量的接收、打包和上傳,指令接收及注入,時鐘輸出等功能。并對程序功能進行了仿真測試,測試結(jié)果表明程序可正確完成預(yù)期功能。 3、對數(shù)據(jù)傳輸系統(tǒng)進行了測試。將程序?qū)懭隖PGA后進行測試,測試結(jié)果表明系統(tǒng)可以正確完成數(shù)據(jù)傳輸任務(wù)。對數(shù)據(jù)傳輸系統(tǒng)供電后,電源模塊輸出電壓穩(wěn)定,FPGA和LVDS模塊均工作正常?砷L時間正確的進行科學(xué)與工程數(shù)據(jù)以及溫度數(shù)據(jù)的采集,以及正確接收上位機指令并通過LVDS數(shù)據(jù)線發(fā)送。
[Abstract]:HXMTS (hard X-ray Modulation Telescope) is a space telescope independently developed in China for the detection of X-ray information in the outer galaxies. It uses the signals of low, middle and high energy bands to modulate the images directly. In this paper, the function of each module software of low-energy detector's chassis and electronic control box is simulated and tested. At the same time, a special data transmission system is developed, which is used to transmit data during the development phase of detector chassis. The work and results are as follows: 1. The FPGA program of the low energy detector chassis and the electronic control box is evaluated. The test platform is Libero IDE 9.1 and the built-in Modelsim simulation software. The test results show that the function of the software basically meets the requirements. The main functions of the detector box are to collect CCD case data, configure DAC and detector driver, and configure working parameters. The main functions of the electronic control box are receiving detector data and uploading, receiving instructions and injecting detector chassis. The test results show that the configuration timing of detector drive does not meet the requirements. After analysis and research, the modified scheme is given. The software configuration driver function after the modification meets the requirements. 2. The hardware and software modules of the data transmission system are designed. In the hardware aspect, FPGA is used as the main control chip. Because of the parallel processing characteristic of FPGA, the system realizes the high speed processing ability. In order to ensure the high reliability of signal transmission, Low-Voltage differential signaling (LVDS) transmission mode is adopted as the mode of communication with the detector chassis, which is due to the fact that LVDS has this kind of I / O technology with common mode suppression ability. It can achieve high noise suppression ability. In software aspect, the program is written with VHDL hardware description language, which realizes the functions of receiving, packing and uploading energy event data and state quantity, receiving and injecting instruction, and clock output. The program function is simulated and tested. The test results show that the program can fulfill the expected function correctly. 3. The data transmission system is tested. The program is written into FPGA and tested. The test results show that the system can complete the data transfer task correctly. After supplying power to the data transmission system, the output voltage of the power module is stable and the FPGA and LVDS modules are working normally. It can collect scientific and engineering data and temperature data correctly for a long time, and receive instructions from upper computer correctly and send them through LVDS data line.
【學(xué)位授予單位】:云南大學(xué)
【學(xué)位級別】:碩士
【學(xué)位授予年份】:2015
【分類號】:TN919.3;TN791

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