發(fā)布時間：2018-06-11 13:15

  本文選題：FinFET + 單粒子翻轉效應��； 參考：《西安電子科技大學》2015年碩士論文

【摘要】：隨著國防軍事的迅速發(fā)展,IC芯片因輻射效應導致的問題也越來越嚴重,電子元器件及芯片系統(tǒng)在輻射環(huán)境下可靠性研究變得更加重要,從未來發(fā)展來看,抗輻射效應加固的問題可能成為影響整個半導體行業(yè)發(fā)展一個重要因素,對抗輻射問題的研究對半導體技術產生深刻影響。比如,當一個新型元器件研制出來后首先就要對它進行輻射可靠性測試,對芯片系統(tǒng)設計的過程當中提高它的抗輻射能力一直是此過程當中重要目標。因為在實驗室中存在各種局限難以開展空間輻射效應的實驗,所以對輻射效應進行模擬仿真變得很重要,仿真所得數據結論也可以對電子元器件或芯片系統(tǒng)設計提供一定參考。本文從介紹各種輻射效應環(huán)境角度出發(fā),重點分析了單粒子輻射效應對FinFET新型器件的影響,通過對FinFET的單粒子效應的仿真分析得到了下面三個方面的研究成果:1、介紹了FinFET新型器件的工作原理及其優(yōu)勢,并利用Sentaurus TCAD軟件建立了它的三維結構模型,基于重粒子轟擊理論模型模擬了不同能量的重粒子轟擊FinFET器件漏極而產生的單粒子效應,研究結果表明,當FinFET漏區(qū)受到重粒子轟擊時,由于重粒子在穿透路徑上沉積能量而產生電子空穴對,并在外電場的作用下分離,從而產生一個漏極脈沖電流,這個電流跟經典雙指數脈沖電流一致,隨粒子的LET值增加而變大。2、通過對比分析得知:體硅FinFET由于比平面MOSFET的敏感體積小因此它的抗單粒子翻轉效應能力強;針對SOI和體硅兩種不同結構的FinFET,SOI結構存在埋氧層隔離使得襯底里面產生的電荷不能被漏端收集,因而SOI結構比體硅結構抗輻射能力好;可以通過適當提高源端電壓減弱寄生雙極放大效應和降低鰭的高度來縮短單粒子在硅體中的徑跡路徑來提高抗輻射能力。由這些對比分析得知寄生雙極晶體管對漏端脈沖電流的貢獻不如忽視,用寄生雙極放大因子α來衡量貢獻大小,通過計算發(fā)現α隨鰭高增加而非線性增加,提高源端電壓α值變小,SOI結構的α值比體硅結構大。3、使用Hspice仿真軟件對基于FinFET結構SRAM電路進行抗單粒子翻轉效應的加固設計,首先簡要介紹了BSIM-CMG庫模型,這個spice模型庫是標準FinFET模型;接著基于提高源端電壓可減弱寄生雙極放大效應的理論基礎上提出了五種不同的SRAM存儲單元;最后對比分析了類型A和類型E的抗單粒子翻轉的能力以及這五種SRAM單元的靜態(tài)噪聲裕度、讀噪聲裕度和寫噪聲裕度,為設計具有抗單粒子翻轉能力的SRAM單元提供了一定依據。
[Abstract]:With the rapid development of national defense and military, the problem of IC chip caused by radiation effect is becoming more and more serious. The research of reliability of electronic components and chip system in radiation environment becomes more and more important. The problem of anti-radiation effect reinforcement may become an important factor affecting the development of semiconductor industry, and the study of radiation resistance has a profound impact on semiconductor technology. For example, when a new type of component is developed, it is necessary to test its radiation reliability first, and it is an important goal to improve its anti-radiation ability in the process of chip system design. Because there are various limitations in the laboratory, it is difficult to carry out the experiment of space radiation effect, so it is very important to simulate and simulate the radiation effect. The conclusion of the simulation data can also provide some reference for the design of electronic component or chip system. In this paper, from the point of view of introducing various radiation effects, the influence of single particle radiation effect on FinFET novel devices is analyzed. Through the simulation analysis of single particle effect of FinFET, the following three aspects of research result: 1 are obtained. The principle and advantages of FinFET new device are introduced, and the three-dimensional structure model of FinFET is established by using Saurus TCAD software. Based on the theoretical model of heavy particle bombardment, the single particle effect caused by heavy particle bombarding FinFET devices with different energies is simulated. The results show that, when the FinFET leakage region is bombarded by heavy particles, Due to the deposition of energy on the penetration path by heavy particles, an electron hole pair is produced and separated by an external electric field, which generates a drain pulse current, which is consistent with the classical double exponential pulse current. With the increase of let value of particles, it becomes larger. 2. Through comparative analysis, it is found that bulk silicon FinFET has stronger anti-single particle flip effect because of its smaller sensitive volume than planar MOSFET. For the two different structures of SOI and bulk silicon, the buried oxygen layer exists in the SOI structure, so the charge generated in the substrate can not be collected by the drain end, so the SOI structure has better radiation resistance than the bulk silicon structure. The anti-radiation ability can be improved by properly increasing the source terminal voltage to reduce the parasitic bipolar amplification effect and to reduce the height of the fin to shorten the track path of single particle in the silicon body. It is found that the contribution of parasitic bipolar transistors to the leakage pulse current is not as good as that of the parasitic bipolar transistors. The contribution is measured by the parasitic bipolar amplification factor 偽. It is found by calculation that 偽 increases nonlinear with the increase of fin height. The 偽 value of SOI structure is larger than that of bulk silicon structure by increasing the source voltage. The SRAM circuit based on FinFET structure is strengthened with HSPICE simulation software. Firstly, the BSIM-CMG library model is introduced briefly. The spice model base is a standard FinFET model, and then five different memory cells are proposed based on the theory that increasing the source voltage can reduce the parasitic bipolar amplification effect. Finally, the ability of type A and type E to resist single particle flipping and the static noise margin, read noise margin and write noise margin of the five SRAM cells are compared and analyzed, which provides a basis for the design of SRAM cells with the ability to resist single particle flipping.
【學位授予單位】：西安電子科技大學
【學位級別】：碩士
【學位授予年份】：2015
【分類號】：TN386

【參考文獻】

相關期刊論文 前6條

1 王步冉;夏克強;;SRAM的SEU效應及加固技術三維數值模擬[J];質量與可靠性;2012年03期

2 ;3-D TCAD simulation study of the single event effect on 25 nm raised source-drain FinFET[J];Science China(Technological Sciences);2012年06期

3 ;Research on single event transient pulse quenching effect in 90 nm CMOS technology[J];Science China(Technological Sciences);2011年11期

4 賀朝會,李國政,羅晉生,劉恩科;CMOS SRAM單粒子翻轉效應的解析分析[J];半導體學報;2000年02期

5 王麗君;空間電子學的單粒子效應[J];空間電子技術;1998年04期

6 王長河;單粒子效應對衛(wèi)星空間運行可靠性影響[J];半導體情報;1998年01期

，

本文編號：2005376