本文選題：霍夫曼編碼 + 硬件排序　； 參考：《計(jì)算機(jī)科學(xué)》2017年S2期

【摘要】：針對軟件霍夫曼靜態(tài)編碼計(jì)算量大,而動(dòng)態(tài)霍夫曼編碼使得解碼器同樣復(fù)雜的缺點(diǎn),提出了一種準(zhǔn)動(dòng)態(tài)霍夫曼硬件編碼器。該編碼器每次對一組數(shù)據(jù)序列進(jìn)行靜態(tài)編碼,然后將編碼并行輸出,從而使得編碼器具有較高的編碼速度,而其延遲時(shí)間僅為一次編碼過程的總時(shí)間。首先,為了充分利用硬件并行特性,分別使用動(dòng)態(tài)排序和靜態(tài)排序兩種排序網(wǎng)絡(luò),以適應(yīng)不同場合的編碼需要。然后,使用數(shù)據(jù)流驅(qū)動(dòng)的硬件二叉樹構(gòu)建和解析結(jié)構(gòu)得到信源符號對應(yīng)的霍夫曼編碼。最后,將儲(chǔ)存在FIFO中的輸入數(shù)據(jù)查表并輸出。設(shè)計(jì)結(jié)果表明,當(dāng)使用Nexys4DDR平臺(tái)時(shí),該編碼器可以工作于100MHz以上的頻率,同時(shí)具有吞吐高、延遲低、編碼效率高和譯碼器簡單的特性。
[Abstract]:A quasi-dynamic Huffman hardware encoder is proposed to solve the problem that the software Hoffman static coding requires a large amount of computation while the dynamic Huffman coding makes the decoder equally complex. The encoder encodes a set of data sequences statically each time, and then outputs the encoding in parallel, so that the encoder has a higher coding speed, and its delay time is only the total time of the single coding process. Firstly, in order to make full use of hardware parallelism, two sort networks, dynamic sorting and static sorting, are used to meet the coding needs of different situations. Then, the Huffman code corresponding to the source symbol is obtained by constructing and parsing the hardware binary tree driven by the data stream. Finally, the input data stored in FIFO is checked and output. The design results show that the encoder can work at frequencies above 100MHz with high throughput, low delay, high coding efficiency and simple decoder when using Nexys4DDR platform.
【作者單位】： 浙江大學(xué)電氣工程學(xué)院;
【分類號】：TN762

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本文編號：1837680