本文選題：沖擊脈沖探地雷達(dá) + FPGA��； 參考：《沈陽航空航天大學(xué)》2015年碩士論文

【摘要】：探地雷達(dá)是一種利用高頻電磁脈沖對地下物質(zhì)進(jìn)行信息獲取的探測方法，根據(jù)接收到回波信號的變化信息，對地下介質(zhì)的結(jié)構(gòu)、位置、形態(tài)進(jìn)行合理推斷。沖擊脈沖探地雷達(dá)以其速度快、分辨率高、頻帶寬、無損性等優(yōu)點(diǎn)成為當(dāng)前市場中應(yīng)用最為廣泛的探測設(shè)備，其回波信號攜帶大量的地下信息，獲取的信息越多，所探測未知區(qū)域越清晰。因此，對沖擊脈沖探地雷達(dá)采集系統(tǒng)的研究具有重要的價(jià)值和意義。 本文首先介紹了沖擊脈沖探地雷達(dá)的工作原理，根據(jù)其脈沖信號的特性和參數(shù)的要求對沖擊脈沖探地雷達(dá)的結(jié)構(gòu)進(jìn)行系統(tǒng)研究，在此基礎(chǔ)上利用高速ADC芯片設(shè)計(jì)一種對沖擊脈沖探地雷達(dá)回波信號的采集方案。采集系統(tǒng)以FPGA為核心，，控制系統(tǒng)中各部分工作，對于高速信號要以差分的方式進(jìn)行采集，以保證信號的穩(wěn)定性。采集到的高速數(shù)據(jù)利用FPGA內(nèi)部豐富的RAM塊資源自定制FIFO進(jìn)行多級緩存降速處理，最終以低于采樣頻率幾倍的速率通過USB總線傳至上位機(jī)，以便于后續(xù)的數(shù)據(jù)處理工作。系統(tǒng)利用FPGA及USB接口，使數(shù)據(jù)采集達(dá)到實(shí)時(shí)性的效果。 本文研究的是沖擊脈沖探地雷達(dá)信號采集系統(tǒng)，其核心的部分是利用FPGA控制高速ADC采集和數(shù)據(jù)的緩存存儲。系統(tǒng)通過對硬件電路和軟件部分的調(diào)試，得到了FPGA設(shè)計(jì)部分正確的仿真，實(shí)現(xiàn)了對占空比較低的窄脈沖信號和高頻正弦信號的采集測試以及原始波形和頻譜的恢復(fù)。本系統(tǒng)方案設(shè)計(jì)合理，能夠?qū)崿F(xiàn)對沖擊脈沖探地雷達(dá)回波信號的正確采集與存儲。
[Abstract]:Ground penetrating radar (GPR) is a method to detect the information of underground material by using high frequency electromagnetic pulse. According to the change information of echo signal, the structure, position and shape of underground medium are reasonably inferred.Impulse GPR has become the most widely used detection equipment in the current market because of its high speed, high resolution, frequency bandwidth, nondestructive and so on. Its echo signal carries a lot of underground information, and the more information it gets, the more information it acquires.The clearer the unknown region is detected.Therefore, the research of impulse GPR acquisition system is of great value and significance.In this paper, the working principle of Impulse GPR is introduced, and the structure of Impulse GPR is systematically studied according to the characteristics and parameters of pulse signal.On the basis of this, a high speed ADC chip is used to design a method for collecting the echo signal of impulse ground penetrating radar.The acquisition system takes FPGA as the core, and the control system works in every part of the system. The high speed signal should be collected in a differential way to ensure the stability of the signal.The collected high speed data is processed by using the rich RAM block resource of FPGA to customize the FIFO for multilevel buffer speed reduction, and finally it is transmitted to the host computer by USB bus at a rate several times lower than the sampling frequency, so as to facilitate the subsequent data processing.The system makes use of FPGA and USB interface to achieve real-time effect of data acquisition.In this paper, the Impulse GPR signal acquisition system is studied, the core of which is to use FPGA to control high-speed ADC acquisition and data cache storage.Through debugging the hardware circuit and software, the FPGA design part is simulated correctly, and the acquisition and test of the narrow pulse signal and the high frequency sinusoidal signal with low duty cycle are realized, as well as the original waveform and the recovery of the frequency spectrum.The scheme of this system is reasonable and can realize the correct acquisition and storage of the echo signal of Impulse GPR.
【學(xué)位授予單位】：沈陽航空航天大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2015
【分類號】：TN791;TN957.51

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