基于FPGA高速通用串行接口的設(shè)計(jì)與應(yīng)用
本文選題:FPGA 切入點(diǎn):Serial 出處:《西安電子科技大學(xué)》2015年碩士論文
【摘要】:伴隨數(shù)字信號處理技術(shù)的快速發(fā)展,數(shù)據(jù)吞吐量與日俱增,給數(shù)據(jù)傳輸帶來了新的挑戰(zhàn)。高速串行傳輸系統(tǒng)的出現(xiàn)在一些領(lǐng)域取代了并行數(shù)據(jù)傳輸,提高了傳輸速率,降低了系統(tǒng)成本和設(shè)計(jì)難度。采用FPGA為核心的通用高速串行接口模式已經(jīng)逐漸成為實(shí)現(xiàn)高速數(shù)字信號處理平臺的重要實(shí)現(xiàn)手段。本文的主要研究內(nèi)容如下:首先,較為詳細(xì)的介紹了Xilinx公司FPGA芯片內(nèi)置的高速串行接口——吉比特收發(fā)器(GTP)。從其應(yīng)用領(lǐng)域,到內(nèi)部結(jié)構(gòu),再到工作原理,闡述了Xilinx FPGA內(nèi)置的吉比特收發(fā)器適用于高速串行傳輸應(yīng)用。對Xilinx公司的GTP設(shè)計(jì)和使用的原理、配置方法進(jìn)行了簡單介紹,并利用仿真平臺對GTP的設(shè)計(jì)思路和結(jié)果進(jìn)行了詳實(shí)地驗(yàn)證。其次,依托Rapid IO協(xié)議的基本內(nèi)容,提供了基于Xilinx FPGA的SRIO接口設(shè)計(jì)的原理,并給出了基于SRIO為接口的高速信號處理系統(tǒng)的設(shè)計(jì)思路,通過構(gòu)建SRIO通用硬件測試平臺,對SRIO的多種工作模式進(jìn)行了仿真、測試。驗(yàn)證了基于FPGA的SRIO接口的系統(tǒng)設(shè)計(jì),并對基于SRIO高速接口的性能進(jìn)行了詳實(shí)的分析和測試。之后,基于PCI Express協(xié)議給出了基于PCI-E接口的內(nèi)存設(shè)備的設(shè)計(jì)思路,通過搭建PCI Express硬件測試平臺,對其的數(shù)據(jù)讀寫操作進(jìn)行了相關(guān)測試。驗(yàn)證了基于FPGA的PCI Express接口的系統(tǒng)設(shè)計(jì),并對基于PCI Express高速接口的性能進(jìn)行了分析與測試。最后,以SATA協(xié)議多層結(jié)構(gòu)為基礎(chǔ),闡述了基于Xilinx公司的FPGA的SATA控制器設(shè)計(jì)的原理,并給出了基于SATA的硬盤主控制器的設(shè)計(jì)思路,通過搭建SATA硬件測試平臺,對其的數(shù)據(jù)讀寫操作進(jìn)行了相關(guān)測試。驗(yàn)證了基于FPGA的SATA接口的系統(tǒng)設(shè)計(jì),并對基于SATA高速接口的性能進(jìn)行了分析與測試。本文通過FPGA平臺實(shí)現(xiàn)了多種高速串行傳輸系統(tǒng),詳述了系統(tǒng)設(shè)計(jì)思路,并提供了相關(guān)測試與驗(yàn)證。設(shè)計(jì)中,采用基于FPGA的高速串行傳輸系統(tǒng),可以簡化設(shè)計(jì),降低成本,改善系統(tǒng)性能。
[Abstract]:With the rapid development of digital signal processing technology, data throughput is increasing, which brings new challenges to data transmission.The emergence of high-speed serial transmission system has replaced the parallel data transmission in some fields, which improves the transmission rate and reduces the system cost and design difficulty.The universal high speed serial interface mode with FPGA as the core has gradually become an important means to realize the high speed digital signal processing platform.The main contents of this paper are as follows: firstly, the high speed serial interface (Gigabit transceiver), which is built into Xilinx FPGA chip, is introduced in detail.From its application field, internal structure, and working principle, this paper expounds that Xilinx FPGA built-in Gigabit transceiver is suitable for high-speed serial transmission applications.The principle and configuration method of GTP design and application of Xilinx Company are briefly introduced, and the design ideas and results of GTP are verified in detail by using the simulation platform.Secondly, based on the basic content of Rapid IO protocol, the design principle of SRIO interface based on Xilinx FPGA is provided, and the design idea of high speed signal processing system based on SRIO interface is given.The simulation and test of various working modes of SRIO are carried out.The system design of SRIO interface based on FPGA is verified, and the performance of high speed interface based on SRIO is analyzed and tested in detail.Then, the design idea of memory device based on PCI-E interface is given based on PCI Express protocol, and the data read and write operation of PCI Express is tested by building PCI Express hardware test platform.The system design of PCI Express interface based on FPGA is verified, and the performance of high speed interface based on PCI Express is analyzed and tested.Finally, based on the multi-layer structure of SATA protocol, the design principle of SATA controller based on FPGA of Xilinx company is expounded, and the design idea of main controller of hard disk based on SATA is given. The hardware testing platform of SATA is built.The data read and write operations are tested.The system design of SATA interface based on FPGA is verified, and the performance of high speed interface based on SATA is analyzed and tested.In this paper, a variety of high speed serial transmission systems are implemented on FPGA platform. The design ideas of the system are described in detail, and the relevant testing and verification are provided.In the design, the high speed serial transmission system based on FPGA can simplify the design, reduce the cost and improve the system performance.
【學(xué)位授予單位】:西安電子科技大學(xué)
【學(xué)位級別】:碩士
【學(xué)位授予年份】:2015
【分類號】:TN791;TN911.72;TN914
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