本文選題：時間交替采樣　切入點：高速數(shù)據(jù)采集　出處：《中北大學(xué)》2017年碩士論文

【摘要】：數(shù)據(jù)采集系統(tǒng)廣泛運用于電子通信設(shè)備、測試測量技術(shù)及儀器與雷達等電子系統(tǒng)中。隨著電子技術(shù)、通信技術(shù)和計算機技術(shù)的高速發(fā)展,所測物理量對實時信號處理的速度和精度的要求不斷提高,同時也對數(shù)據(jù)采集設(shè)備的速度和精度提出更高的要求。模數(shù)轉(zhuǎn)換器ADC(Analog-to-Digital Converter)的采樣率和分辨率直接決定了數(shù)據(jù)采集系統(tǒng)的采樣速度和精度。然而,由于集成電路工藝的限制,模數(shù)轉(zhuǎn)換器芯片無法保持較高的采樣精度的前提下提高采樣速度。時間交替TI(Time-interleaved)采樣技術(shù)的提出成為了解決這一問題最有效可行的方案之一,能夠有效突破單片ADC無法同時提高采樣率和分辨率的瓶頸。雖然TIADC系統(tǒng)在保持采樣精度不變的同時提高了采樣速度,由于多片ADC之間的性能差異、采樣間隔非均勻等因素帶來了包括時間誤差、增益誤差和偏置誤差的通道失配誤差。這些誤差將會導(dǎo)致對采集到的信號進行重建時產(chǎn)生諸如時域波形失真、引入頻譜混疊、降低系統(tǒng)信噪比等問題,從而影響采樣信號的精確重構(gòu)和分析。本文通過分析TIADC系統(tǒng)的原理和數(shù)學(xué)模型,運用Matlab軟件分析通道失配誤差的頻譜特性,根據(jù)分析結(jié)果提出誤差校正算法。通過設(shè)計模擬信號輸入模塊、時鐘產(chǎn)生模塊、時間交替采樣的模數(shù)轉(zhuǎn)換模塊、邏輯控制及數(shù)據(jù)緩存模塊實現(xiàn)了12bit、400Msps高速數(shù)據(jù)采集系統(tǒng)。該系統(tǒng)將采集到的數(shù)據(jù)上傳到上位機進行分析,并通過誤差校正算法對采集到的數(shù)據(jù)進行誤差校正。仿真與測試結(jié)果表明系統(tǒng)數(shù)據(jù)采集功能正常,誤差校正算法濾除了由通道失配誤差引起的時域波形中的毛刺噪聲和頻譜中的諧波失真,同時提高了系統(tǒng)動態(tài)參數(shù),驗證了設(shè)計的可行性和算法的有效性。
[Abstract]:Data acquisition systems are widely used in electronic communication equipment, test and measurement technology, and electronic systems such as instruments and radar. With the rapid development of electronic technology, communication technology and computer technology, The requirements for the speed and accuracy of the real time signal processing are constantly improved. The sampling rate and resolution of the analog-to-digital converter (ADC(Analog-to-Digital) directly determine the sampling speed and precision of the data acquisition system. However, due to the limitation of the integrated circuit technology, the speed and accuracy of the data acquisition system are also required. The ADC chip can not keep high sampling precision and improve the sampling speed. The time alternating time interleaved sampling technology has become one of the most effective and feasible solutions to this problem. It can effectively break through the bottleneck that monolithic ADC can not increase the sampling rate and resolution simultaneously. Although the TIADC system not only keeps the sampling accuracy unchanged, but also improves the sampling speed, because of the performance difference between multi-chip ADC, The non-uniform sampling interval brings channel mismatch errors including time error, gain error and bias error. These errors will lead to the distortion of the acquired signal such as time domain waveform distortion and the introduction of spectrum aliasing. In this paper, the principle and mathematical model of TIADC system are analyzed, and the spectrum characteristics of channel mismatch error are analyzed by Matlab software. According to the analysis results, an error correction algorithm is proposed. The analog signal input module, the clock generation module, the time alternating sampling A / D conversion module are designed. The logical control and data cache module implements a 12bit-400 Msps high-speed data acquisition system, which uploads the collected data to the upper computer for analysis. The data collected is corrected by error correction algorithm. The simulation and test results show that the data acquisition function of the system is normal. The error correction algorithm filters the burr noise in the time-domain waveform and the harmonic distortion in the spectrum caused by the channel mismatch error. At the same time, it improves the dynamic parameters of the system and verifies the feasibility of the design and the validity of the algorithm.
【學(xué)位授予單位】：中北大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2017
【分類號】：TN792

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相關(guān)期刊論文 前1條

1 張清洪,呂幼新,王洪,劉霖;多片ADC并行采集系統(tǒng)的誤差時域測量與校正[J];電訊技術(shù);2005年03期

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本文編號：1673802