本文選題：線性功率放大器　切入點(diǎn)：數(shù)控功放　出處：《中國(guó)科學(xué)技術(shù)大學(xué)》2015年碩士論文

【摘要】：功率放大器是整個(gè)收發(fā)機(jī)系統(tǒng)中主要的耗能模塊且有較大的非線性失真,直接影響著設(shè)備的待機(jī)時(shí)間和所能支持的通信速率,因此高能效高線性度的CMOS功放設(shè)計(jì)一直是國(guó)內(nèi)外研究的熱點(diǎn)。 CMOS工藝由于其高的襯底損耗、低的擊穿電壓以及各種寄生電容給大功率線性功放設(shè)計(jì)帶來(lái)了很大的挑戰(zhàn),特別是應(yīng)用于移動(dòng)終端的功放,近年來(lái)高通等公司已經(jīng)相繼推出了相應(yīng)的CMOS功放產(chǎn)品,實(shí)現(xiàn)了不錯(cuò)的性能。本文第一部分設(shè)計(jì)了一種高線性度高效率CMOS線性功放,對(duì)CMOS功放的可靠性和非線性來(lái)源進(jìn)行了深入的分析,并給出了相應(yīng)的解決方案,芯片綁線以及PCB走線等都用HFSS進(jìn)行了建模優(yōu)化。該線性功放采用TSMC0.18um工藝設(shè)計(jì),后仿輸出功率1dB壓縮點(diǎn)P1dB為25.3dBm,在P1dB處功率附加效率PAE接近33%。在ADS的WLAN802.11g仿真平臺(tái)里,輸入64QAM信號(hào),該功放滿足其頻譜掩膜和EVM要求的最大線性輸出功率為15dBm,說(shuō)明功放具有很好的線性度。 由于目前通信通常采用高階的幅度調(diào)制信號(hào),為了滿足其線性度要求,功放必須采用功率回退的方式,這樣會(huì)造成效率的降低。而數(shù)控類功放可以實(shí)現(xiàn)效率和線性度之間更好的權(quán)衡。本文第二部分對(duì)數(shù)控類功放進(jìn)行了研究,對(duì)數(shù)控功放的版圖進(jìn)行優(yōu)化,并采用了新型的二次諧波電流抑制電路和改進(jìn)型的LO驅(qū)動(dòng)電路,設(shè)計(jì)了兩種高效率的數(shù)控功放：(1)針對(duì)藍(lán)牙v4.0應(yīng)用設(shè)計(jì)了一種6位數(shù)控式功放,采用TSMC0.18um工藝,后仿輸出功率為4.3dBm,效率為35%,功放的動(dòng)態(tài)范圍超過(guò)26dB,可以支持藍(lán)牙v4.0的EDR模式；(2)設(shè)計(jì)了一種應(yīng)用于WLAN802.11g的大功率8位數(shù)控的逆D類功放,使用SMIC65nm工藝,后仿結(jié)果顯示,在2.4GHz處的峰值輸出功率為26.1dBm,主功放的漏端效率約為42%,輸出功率變化低于1dB的帶寬為900MHz。 論文第三部分設(shè)計(jì)了一種應(yīng)用于綜合功率控制器的有源巴倫,加入了三級(jí)校正電路、帶寬補(bǔ)償電路和溫度補(bǔ)償電路,并對(duì)開(kāi)關(guān)管的可靠性和非線性進(jìn)行了分析討論。后仿結(jié)果顯示,在1.9-2.6GHz帶寬內(nèi)輸出差分信號(hào)幅度誤差控制在0.2dB以內(nèi),相位誤差控制在1°以內(nèi)。通過(guò)帶寬補(bǔ)償技術(shù)使整個(gè)功率控制器系統(tǒng)的增益變化低于1dB的帶寬大于1GHz。
[Abstract]:Power amplifier is the main energy dissipation module in the whole transceiver system and has large nonlinear distortion, which directly affects the standby time of the equipment and the communication rate that can be supported. Therefore, the design of CMOS power amplifier with high energy efficiency and high linearity has been a hot spot at home and abroad. Because of its high substrate loss, low breakdown voltage and various parasitic capacitors, CMOS process brings great challenges to the design of high power linear power amplifier, especially for mobile terminal. In recent years, Qualcomm and other companies have introduced corresponding CMOS power amplifier products, which have achieved good performance. In the first part of this paper, a high linearity and high efficiency CMOS linear power amplifier is designed. The reliability and nonlinear sources of CMOS power amplifier are analyzed in depth, and the corresponding solutions are given. HFSS is used to model and optimize the chip wire binding and PCB wiring. The linear power amplifier is designed by TSMC0.18um process. The post-output power 1dB compression point P1dB is 25.3 dBm, and the additional power efficiency PAE is close to 33 at P1dB. In the WLAN802.11g simulation platform of ADS, the 64QAM signal is input. The maximum linear output power of this amplifier is 15dBm, which meets the requirements of spectrum mask and EVM, which indicates that the amplifier has good linearity. At present, high order amplitude modulation signal is usually used in communication, in order to meet the linearity requirement, power amplifier must adopt the way of power back. This will result in the reduction of efficiency. The CNC power amplifier can achieve a better trade-off between efficiency and linearity. In the second part of this paper, the numerical control power amplifier is studied, and the layout of the numerical control power amplifier is optimized. A new second harmonic current suppression circuit and an improved Lo drive circuit are used to design two kinds of high efficiency CNC power amplifier: 1) for Bluetooth v4.0 application, a 6-bit numerical control power amplifier is designed, and the TSMC0.18um process is adopted. The output power is 4.3 dBm, the efficiency is 35, the dynamic range of power amplifier is more than 26dB, and the EDR mode can support Bluetooth v4.0. A kind of high power 8-bit NC inverse D power amplifier applied to WLAN802.11g is designed. The SMIC65nm technology is used. The result shows that, The peak output power at 2.4GHz is 26.1 dBm.The leakage efficiency of the main power amplifier is about 42 and the output power change is lower than the bandwidth of 1dB is 900MHz. In the third part of the thesis, we design a kind of active Barron which is applied to the integrated power controller, and add the three-level correction circuit, the bandwidth compensation circuit and the temperature compensation circuit. The reliability and nonlinearity of the switch are analyzed and discussed. The post-simulation results show that the amplitude error of the output differential signal in the 1.9-2.6GHz bandwidth is controlled within the 0.2dB. The phase error is controlled within 1 擄. The gain change of the whole power controller system is lower than that of 1dB with bandwidth compensation technique greater than 1 GHz.
【學(xué)位授予單位】：中國(guó)科學(xué)技術(shù)大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：TN722.75

【共引文獻(xiàn)】

相關(guān)期刊論文 前10條

1 劉祖華;劉斌;黃亮;章國(guó)豪;;應(yīng)用于WLAN的低噪聲放大器及射頻前端的設(shè)計(jì)[J];電子技術(shù)應(yīng)用;2014年01期

2 王立果;周鵬;;一種0.1-1.2GHz的CMOS射頻收發(fā)開(kāi)關(guān)芯片設(shè)計(jì)[J];電子產(chǎn)品世界;2014年Z1期

3 劉斌;劉祖華;黃亮;章國(guó)豪;;2.45GHz 0.18μm CMOS高線性功率放大器設(shè)計(jì)[J];電子技術(shù)應(yīng)用;2014年02期

4 尤云霞;陳嵐;王海永;吳玉平;呂志強(qiáng);;2.4 GHz SiGe HBT E類高功率放大器[J];電子器件;2014年02期

5 尹美良;劉向前;;高性能L頻段頻率合成器的改進(jìn)設(shè)計(jì)[J];電訊技術(shù);2014年07期

6 王晉雄;馬磊;趙東艷;杜鵬程;何洋;;無(wú)源超高頻RFID標(biāo)簽的模擬前端電路設(shè)計(jì)[J];半導(dǎo)體技術(shù);2014年10期

7 盧東旭;高博;吳潔;田國(guó)平;;集成L波段VCO的頻率合成器設(shè)計(jì)[J];半導(dǎo)體技術(shù);2014年12期

8 丁理想;吳洪江;盧東旭;谷江;趙永瑞;;寬帶LC壓控振蕩器的相位噪聲優(yōu)化設(shè)計(jì)[J];半導(dǎo)體技術(shù);2015年02期

9 盧東旭;高博;耿雙利;田國(guó)平;谷江;丁理想;趙永瑞;;基于導(dǎo)航系統(tǒng)的低功耗全集成頻率綜合器設(shè)計(jì)[J];半導(dǎo)體技術(shù);2015年06期

10 鄒鷺;卜剛;鄒志鵬;;一種用于衛(wèi)星導(dǎo)航接收機(jī)的低噪聲放大器設(shè)計(jì)[J];電子科技;2015年06期

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