本文選題：模擬電路故障診斷　切入點：測試程序集　出處：《北方工業(yè)大學(xué)》2015年碩士論文

【摘要】：近年來,因為科技與信息化產(chǎn)業(yè)的發(fā)展,現(xiàn)代的電子設(shè)備對于精確度與復(fù)雜度要求越來越高,設(shè)備中內(nèi)置的電路板的精密性與復(fù)雜度飛速提升,相應(yīng)的模擬電路的功能測試與故障診斷環(huán)節(jié)的重要性被認為是一款設(shè)備是否穩(wěn)定,是否優(yōu)秀的重要標準。在模擬電路功能測試與故障診斷中,測試程序集(Test Program Set,簡稱TPS)是決定測試效率與診斷率的重要核心,因此,在模擬電路故障領(lǐng)域中,一款TPS與其相應(yīng)的配套環(huán)境的性能將直接決定電路板以及電子裝備的性能。所以在設(shè)計與研發(fā)電子產(chǎn)品中,自主研發(fā)出一套高效的,自動的TPS對于模擬電路領(lǐng)域是尤為重要并且亟待解決并且提高的重要環(huán)節(jié)。 本文在VisioStudio2010環(huán)境下使用C++語言設(shè)計并且實現(xiàn)了模擬電路自動測試程序生成系統(tǒng)。本系統(tǒng)基于IEEE1232協(xié)議,實現(xiàn)了測試程序集的自動化,詳細給出了針對模擬電路的功能測試與故障診斷的方法：通過將IEEE1232給出的AI-ESTATE模型進行擴充,增添人工免疫系統(tǒng)模型(Artificial Immune System Model,簡稱AISM),神經(jīng)網(wǎng)絡(luò)模型(Back Propagation Model,簡稱BPM),支持向量機模型(Support Vector Machine Model,簡稱SVMM)于AI-ESTATE中,本系統(tǒng)通過調(diào)用各種模型完成功能測試與故障診斷,并且通過對IEEE1232提出的故障樹模型進行匹配,融合SVM算法,設(shè)計并且實現(xiàn)了模擬電路故障樹的自動生成,在故障診斷中能夠?qū)隤CB模型并且顯示錯誤器件,最后通過調(diào)用Word自動生成相關(guān)Word文檔實現(xiàn)自動生成報表功能。通過測試表明,該系統(tǒng)能夠替代以往通過人工知識手動進行測試的決策樹方法,能夠提高測試效率,具有操作簡單,測試成功率與穩(wěn)定性較原來的測試程序相比有所提高。 本文研發(fā)的模擬電路自動測試程序生成系統(tǒng)實現(xiàn)了上述的功能,并且順利通過測試實驗證明的本系統(tǒng)的可行性與適用性。
[Abstract]:In recent years, due to the development of science and technology and information industry, modern electronic devices require more and more precision and complexity. The importance of functional testing and fault diagnosis of analog circuits is considered to be an important standard of whether the equipment is stable and excellent. In the functional testing and fault diagnosis of analog circuits, Test Program Settings (TPSs) are the core of testing efficiency and diagnostic rate. Therefore, in the field of analog circuit fault, The performance of a TPS and its corresponding supporting environment will directly determine the performance of circuit boards and electronic equipment. Automatic TPS is an important step in analog circuit field. This paper uses C language to design and realize the automatic test program generation system of analog circuit in VisioStudio2010 environment. Based on IEEE1232 protocol, the system realizes the automation of test assembly. The methods of function test and fault diagnosis for analog circuits are given in detail. By extending the AI-ESTATE model given by IEEE1232, The artificial Immune System Model (AIS), the Neural Network Model (BP Propagation Model) and the support Vector Machine Model (support Vector Machine Model) are added to the AI-ESTATE. The system completes the function test and fault diagnosis by calling various models. By matching the fault tree model proposed by IEEE1232 and merging the SVM algorithm, the automatic generation of fault tree in analog circuit is designed and realized. The fault tree can be imported into PCB model and error devices can be displayed in fault diagnosis. Finally, by calling Word to automatically generate relevant Word documents, the function of generating reports automatically is realized. The test results show that the system can replace the decision tree method of manual testing by manual knowledge, and can improve the efficiency of testing. With simple operation, the test success rate and stability compared with the original test program has been improved. The automatic test program generation system of analog circuit developed in this paper has realized the above functions, and the feasibility and applicability of the system have been proved by the test experiment.
【學(xué)位授予單位】：北方工業(yè)大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2015
【分類號】：TN710

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本文編號：1653015