本文選題：集成電路　切入點：低功耗　出處：《電子學報》2017年03期 　論文類型：期刊論文

【摘要】：針對振蕩器功耗大和振蕩頻率低的問題,提出了一種基于電流差分級聯跨導放大器的三階正交振蕩電路.該電路僅使用一個電流差分級聯跨導放大器和三個接地無源電容,可以同時產生兩組等幅正交電流信號和一組等幅正交電壓信號.電路結構簡單,功耗低至1.8m W,最大靈敏度絕對值僅0.5,振蕩頻率可達10MHz數量級,而且振蕩條件和震蕩頻率可相互獨立地電控調諧.計算機模擬和流片芯片測試結果驗證了理論分析的正確性.
[Abstract]:Aiming at the problems of high power consumption and low oscillation frequency of the oscillator, a three-order orthogonal oscillation circuit based on the current differential cascade transconductance amplifier is proposed. The circuit uses only one current-differential cascade transconductance amplifier and three grounded passive capacitors. Two sets of equal-amplitude orthogonal current signals and one set of equal-amplitude quadrature voltage signals can be generated simultaneously. The circuit has simple structure, low power consumption up to 1.8 MW, the maximum sensitivity is only 0.5, and the oscillation frequency can reach the order of 10 MHz. Moreover, the oscillation condition and frequency can be independently tuned by electronic control. The results of computer simulation and chip chip test verify the correctness of the theoretical analysis.
【作者單位】： 湖北理工學院機電工程學院;
【基金】：湖北省教育廳科研資助項目(No.2014681)
【分類號】：TN752
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本文編號：1631025