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  本文選題：輸電線路　切入點：故障行波　出處：《華東交通大學(xué)》2015年碩士論文　論文類型：學(xué)位論文

【摘要】：在電力系統(tǒng)中，輸電線路是電力系統(tǒng)安全、穩(wěn)定運行的關(guān)鍵，其故障直接威脅到電力系統(tǒng)的運行。因此，快速準確定位出故障發(fā)生地點并進行故障排除是保證電力系統(tǒng)安全、穩(wěn)定運行的重要措施。針對這個問題，國內(nèi)外已研制出多部行波故障測距裝置并投入使用，獲得了良好的結(jié)果�，F(xiàn)在FPGA芯片的發(fā)展和小波變換信號處理技術(shù)將更加推進相關(guān)裝置的研究。 本論文主要完成基于FPGA的行波故障定位裝置的硬件調(diào)試與FPGA硬件邏輯設(shè)計。其中包括裝置內(nèi)部所用硬件的調(diào)試、FPGA芯片模塊總體框架、裝置運行的總體流程和各個功能模塊的實現(xiàn)。行波故障測距裝置硬件有AD采集卡、FPGA芯片、SDRAM芯片、USB和LAN；各個功能模塊使用Verilog HDL硬件語言編寫，包括AD采樣模塊、小波濾波器模塊、SDRAM存儲模塊和故障測距模塊等。裝置前端為AD采樣模塊，完成行波故障信號的快速、準確采集。小波濾波器模塊對AD采樣后的數(shù)據(jù)進行濾波，濾波系數(shù)為小波系數(shù)。小波濾波器采用FIR編譯器的IP核設(shè)計，具有穩(wěn)定性、靈活性且方便移植。故障測距模塊通過閾值法提取行波波峰，故障距離算法采用單端法。SDRAM模塊用于控制存儲的行波數(shù)據(jù)，在用戶需求時可以將數(shù)據(jù)上傳至上位機。本文最后建立MATLAB輸電線路故障仿真模型輸出故障信號模擬量，再對整個裝置進行SignalTapII仿真，測試其計算故障距離結(jié)果。通過驗證，本文設(shè)計的行波故障測距裝置可以有效實現(xiàn)單端法故障測距，符合工程實際需求。 此外，本論文設(shè)計的行波故障測距裝置硬件方面具有2個SDRAM和留有多個可擴展I/O口。雙SDRAM可實現(xiàn)無間斷存儲數(shù)據(jù)；擴展I/O口可插入GPS芯片實現(xiàn)網(wǎng)絡(luò)對時，從而可實現(xiàn)雙端法故障測距。 本論文設(shè)計的行波故障測距裝置采用FPGA芯片完成，具有良好的靈活性和穩(wěn)定性。為今后的行波故障測距裝置的繼續(xù)研發(fā)打下了良好的基礎(chǔ)。
[Abstract]:In the power system, transmission line is the key to the safe and stable operation of the power system, and its faults directly threaten the operation of the power system. Therefore, it is necessary to quickly and accurately locate the fault location and troubleshoot the power system to ensure the safety of the power system. To solve this problem, many traveling wave fault location devices have been developed and put into use at home and abroad. The development of FPGA chip and wavelet transform signal processing technology will further promote the research of related devices. This paper mainly completes the hardware debugging and FPGA hardware logic design of the traveling wave fault location device based on FPGA, including the overall frame of the hardware debugging chip module used in the device. The hardware of the traveling wave fault location device includes AD acquisition card, FPGA chip, SDRAM chip, USB and LAN, and each function module is written in Verilog HDL hardware language, including AD sampling module. The wavelet filter module includes SDRAM storage module and fault location module. The front end of the device is AD sampling module, which completes the fast and accurate acquisition of traveling wave fault signal. The filter coefficient is wavelet coefficient. The wavelet filter is designed by IP core of FIR compiler, which is stable, flexible and easy to transplant. The fault location module extracts the traveling wave peak by threshold method. The fault distance algorithm uses single end method. SDRAM module is used to control the stored traveling wave data, and the data can be uploaded to the upper computer when the user needs it. Finally, the MATLAB transmission line fault simulation model is established to output the simulation quantity of the fault signal. Then the whole device is simulated by SignalTapII, and the result of calculating fault distance is tested. It is verified that the traveling wave fault location device designed in this paper can effectively realize the single-ended fault location, which is in line with the practical requirements of engineering. In addition, the traveling wave fault location device designed in this paper has two SDRAM and several extensible I / O ports. The dual SDRAM can store data without interruption, and the extended I / O port can be inserted into the GPS chip to realize network alignment. Thus, dual end fault location can be realized. The traveling wave fault location device designed in this paper is completed by FPGA chip, which has good flexibility and stability, which lays a good foundation for the further research and development of traveling wave fault location device.
【學(xué)位授予單位】：華東交通大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2015
【分類號】：TN791;TM75

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本文編號：1629852