本文選題：線性功率放大器　切入點：包絡跟蹤功率放大器　出處：《東南大學》2017年碩士論文　論文類型：學位論文

【摘要】：隨著4G-LTE無線通信技術(shù)的廣泛使用,需要性能更加優(yōu)越的射頻發(fā)射機系統(tǒng),在發(fā)射機中功率放大器的能耗最大,同時成本也很高,因此市場上對高效率高線性度和低成本的功率放大器產(chǎn)品需求越來越強烈,而基于硅基工藝的功率放大器,優(yōu)勢在于成本低廉,工藝制程先進。因此對硅基2.4GHz高效率線性功率放大器的設計展開研究具有重要的理論意義和應用價值。本文基于0.18μm SiGe BiCMOS工藝設計工作于2.4GHz的高效率線性功率放大器。整個高效率線性功率放大器由線性功率放大器和包絡跟蹤模塊構(gòu)成。線性功率放大器采用兩路完全相同的AB類功率放大器合成,單路線性功率放大器采用cascode結(jié)構(gòu),以解決工藝中單HBT晶體管耐壓低的問題,采用偽差分對稱結(jié)構(gòu)以減小寄生參數(shù)的影響。整個線性功率放大器采用分布式LC功率合成技術(shù)以提高輸出功率,采用片外分立元件設計功率放大器的輸入輸出匹配網(wǎng)絡。包絡跟蹤模塊由包絡檢波器和包絡調(diào)制器構(gòu)成,其中包絡檢波器對射頻信號進行檢波,包絡調(diào)制器則根據(jù)提取的包絡信號對功率放大器電源電壓進行動態(tài)調(diào)制,在低功率輸入時,自動降低功率放大器的電源電壓;在高功率輸入時,自動提高功率放大器的電源電壓,從而有效提升了功率放大器的效率。論文給出了線性功率放大器和包絡跟蹤模塊的電路設計和版圖設計,并進行了前仿真和后仿真。后仿真結(jié)果表明,在線性功率放大器的工作電壓為5V時,TT工藝角的不同溫度下,功率放大器始終處于穩(wěn)定狀態(tài),S11小于-10dB,輸出功率大于33dBm;在TT27℃C時,功率附加效率為42.81%,輸出1dB壓縮點為29.61dBm。采用包絡跟蹤技術(shù)的高效線性功率放大器在LTE 16QAM 5MHz信號輸入時,平均輸出功率為27.8dBm,此時功率附加效率為24.5%,最大輸出功率時的功率增益為23.47dB,滿足指標要求。因此,本課題所設計的高效線性功率放大器后仿真結(jié)果滿足設計指標要求,后期需根據(jù)實際芯片的測試結(jié)果作進一步的優(yōu)化和調(diào)試。
[Abstract]:With the wide use of 4G-LTE wireless communication technology, RF transmitter system with more superior performance is needed. In the transmitter, the power amplifier has the most energy consumption and the cost is also very high. Therefore, there is a growing demand for high efficiency, high linearity and low cost power amplifiers in the market, and the advantage of silicon based power amplifiers lies in their low cost. The process is advanced. Therefore, it is of great theoretical significance and practical value to study the design of Si-based 2.4GHz high efficiency linear power amplifier. This paper based on 0.18 渭 m SiGe BiCMOS process design works in 2.4GHz high efficiency linear power amplifier. The whole high efficiency linear power amplifier consists of a linear power amplifier and an envelope tracking module. The linear power amplifier is composed of two identical AB power amplifiers, The single channel linear power amplifier adopts cascode structure to solve the problem of low voltage resistance of single HBT transistor. The pseudo-differential symmetry structure is used to reduce the influence of parasitic parameters. The whole linear power amplifier uses distributed LC power combination technology to improve the output power. The input and output matching network of the power amplifier is designed by using an off-chip discrete element. The envelope tracking module is composed of an envelope detector and an envelope modulator, in which the envelope detector detects the RF signal. The envelope modulator dynamically modulates the power supply voltage of the power amplifier according to the extracted envelope signal, and automatically reduces the power supply voltage of the power amplifier at low power input. In order to improve the efficiency of power amplifier, the circuit design and layout design of linear power amplifier and envelope tracking module are given. The results of pre-simulation and post-emulation show that the power amplifier is always in a stable state (S11 < -10dB, output power more than 33dBm) at different temperatures of TT process angle when the operating voltage of the linear power amplifier is 5V, and the output power is more than 33dBm at TT27 鈩，

本文編號：1585290