本文關(guān)鍵詞： 4H-SiC MESFET 緩沖層改進(jìn) 雙凹柵 雙凹陷緩沖層 Γ柵凹陷緩沖層　出處：《西安電子科技大學(xué)》2015年碩士論文　論文類型：學(xué)位論文

【摘要】：碳化硅作為第三代寬帶隙半導(dǎo)體材料,表現(xiàn)出優(yōu)異的材料特性,且金屬半導(dǎo)體場(chǎng)效應(yīng)管器件頻率高、不易發(fā)生二次擊穿。4H-SiC MESFETs器件憑借輸出功率密度大、良好的熱傳導(dǎo)性和高可靠性等特性,在微波頻段的通信、雷達(dá)等設(shè)備中擁有廣泛的應(yīng)用。然而,陷阱效應(yīng)、表面態(tài)過(guò)高、電場(chǎng)轟擊效應(yīng)等因素會(huì)導(dǎo)致器件的輸出功率和頻率的下降,因此有必要改進(jìn)器件結(jié)構(gòu)、提高器件性能。提高溝道厚度會(huì)導(dǎo)致相互制約、相互矛盾的結(jié)果:漏端輸出電流增加但擊穿電壓減少,柵源電容減少但跨導(dǎo)也減少。因此,需要針對(duì)性地對(duì)緩沖層進(jìn)行局部改進(jìn),還應(yīng)結(jié)合頂部改進(jìn)才能解決上述制約關(guān)系。本文首次提出了具有雙凹陷緩沖層和多凹陷溝道的4H-SiC MESFET結(jié)構(gòu)(DRB-MESFET)。仿真結(jié)果表明,凹陷源/漏漂移區(qū)能夠削弱柵極拐角處的電場(chǎng)集邊效應(yīng),繼而提高器件的擊穿電壓。同時(shí),凹陷的區(qū)域抑制柵耗盡層向源/漏兩側(cè)延伸,降低柵源和柵漏寄生電容,從而改善器件的頻率特性、提高小信號(hào)增益性能。另外,通過(guò)引入雙凹陷緩沖層,有效溝道厚度變寬,電流得到提高,而柵極相對(duì)于溝道距離沒(méi)變,導(dǎo)致柵極對(duì)電流的控制作用變強(qiáng),改善跨導(dǎo)特性。與僅含有凹陷源/漏漂移區(qū)的結(jié)構(gòu)相比較,柵源電容基本保持不變,而漏端輸出電流和跨導(dǎo)顯著提高,使得器件的直流特性和頻率特性有顯著的提升。與傳統(tǒng)的雙凹柵結(jié)構(gòu)(DR-MESFET)相比較,DRB-MESFET結(jié)構(gòu)比漏端飽和電流提高38%,擊穿電壓提高27%,最大功率密度提高74%,柵源電容減少32%,并且截止頻率和最大振蕩頻率分別從16.7、57.2GHz提高到24.7、63.9GHz。本文首次提出一種新的具有Γ柵凹陷緩沖層的4H-SiC MESFET結(jié)構(gòu)(ΓRB-MESFET)。通過(guò)改變高柵、低柵相對(duì)溝道表面的位置,使得柵下的溝道厚度變大,得到更大的漏端輸出電流。低柵源側(cè)不再向下凹陷,減少該處的電場(chǎng)集邊效應(yīng),提高器件的擊穿電壓。同時(shí)緩沖層向溝道凹陷,使得低柵與溝道底部的相對(duì)距離保持不變,確保溝道電流能夠有效地被柵壓控制,從而提高器件頻率特性。仿真結(jié)果表明,ΓRB-MESFET結(jié)構(gòu)的最大功率密度比DR-MESFET結(jié)構(gòu)增加42%,截止頻率增加19%。若增加高柵相對(duì)溝道表面的高度,使得高柵下的耗盡層區(qū)域在溝道層的面積減少,不僅增大漏端飽和電流,同時(shí)進(jìn)一步阻礙柵耗盡層向源/漏兩側(cè)擴(kuò)展,降低柵源電容和漏柵電容。更為明顯的是,隨著高柵相對(duì)溝道表面的距離增加,高柵邊緣源側(cè)將出現(xiàn)新的電場(chǎng)密度峰值,這將有效緩解電場(chǎng)集邊效應(yīng),提高器件的擊穿電壓。
[Abstract]:As the third generation wide band gap semiconductor material, silicon carbide has excellent material properties, and the metal semiconductor FET device has high frequency and is not easy to occur secondary breakdown. 4H-SiC MESFETs device has high output power density. Good thermal conductivity and high reliability have been widely used in microwave communication, radar and other equipment. However, the trap effect, the surface state is too high, The electric field bombardment effect and other factors will lead to the decrease of the output power and frequency of the device, so it is necessary to improve the device structure and improve the device performance. Contradictory results: the leakage output current increases but the breakdown voltage decreases, the gate source capacitance decreases but the transconductance decreases. In this paper, the 4H-SiC MESFET structure with double indentation buffer layer and multi-depression channel is proposed for the first time. The simulation results show that, The drift region of the source / drain can weaken the electric field side effect at the corner of the grid and increase the breakdown voltage of the device. At the same time, the region of the depression can restrain the grid depletion layer from extending to the source / drain, and reduce the parasitic capacitance of the gate source and drain. In addition, the effective channel thickness is widened, the current is increased, and the gate is not changed relative to the channel distance by introducing a double sag buffer layer to improve the frequency characteristics of the device and the small signal gain. As a result, the grid control effect on the current becomes stronger, and the transconductance is improved. Compared with the structure containing only the recessed source / drain drift region, the gate source capacitance remains basically unchanged, while the drain end output current and transconductance are significantly increased. Compared with the traditional double-concave gate structure DR-MESFET, the DRB-MESFET structure increases the saturation current at the leakage end by 38, the breakdown voltage increases by 27, the maximum power density increases by 74, and the gate source capacitance decreases by 32. The cutoff frequency and the maximum oscillation frequency are increased from 16.7g ~ 57.2GHz to 24.7 ~ 63.9GHz respectively. In this paper, a new 4H-SiC MESFET structure (螕 RB-MESFETT) with 螕 -gate sag buffer layer is proposed for the first time. The location of the low gate relative to the channel surface increases the thickness of the channel under the gate, resulting in a larger leakage output current. Increase the breakdown voltage of the device. At the same time, the buffer layer sags to the channel, so that the relative distance between the low gate and the bottom of the channel remains unchanged, ensuring that the channel current can be effectively controlled by the gate voltage. The simulation results show that the maximum power density and cutoff frequency of 螕 RB-MESFET structure are 42 more than those of DR-MESFET structure. If the height of high gate relative to channel surface is increased, the area of depletion layer under high gate will decrease. It not only increases the saturation current at the drain end, but also further hinders the expansion of the drain layer to both sides of the source / drain, reducing the gate source capacitance and the leakage gate capacitance. More obviously, with the increase of the distance between the high gate and the channel surface, There will be a new peak electric field density at the edge of the high gate, which can effectively alleviate the electric field side effect and increase the breakdown voltage of the device.
【學(xué)位授予單位】：西安電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：TN386

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