本文關(guān)鍵詞： SiC功率MOSFET 開關(guān)損耗 界面態(tài) 輸出電容　出處：《安徽工業(yè)大學(xué)》2017年碩士論文　論文類型：學(xué)位論文

【摘要】：隨著當(dāng)今科技的日漸發(fā)展,碳化硅功率器件備受人們的關(guān)注。以SiC功率MOSFET為例,其低導(dǎo)通電阻、耐高溫和高開關(guān)頻率等特性使之深受高電壓大功率開關(guān)設(shè)備的青睞。SiC功率MOSFET開關(guān)損耗的真實(shí)估計(jì)對(duì)于準(zhǔn)確預(yù)測(cè)功率電子器件的最大結(jié)溫和效率至關(guān)重要,因此,正確的開關(guān)損耗計(jì)算公式尤為重要。傳統(tǒng)測(cè)量開關(guān)損耗的方法對(duì)于像SiC功率MOSFET這樣的功率器件缺乏一些物理角度上的理解。本文將從物理角度出發(fā),對(duì)傳統(tǒng)計(jì)算開關(guān)損耗的公式提出質(zhì)疑。通過半導(dǎo)體器件仿真軟件ATLAS對(duì)SiC功率MOSFET的開關(guān)動(dòng)態(tài)進(jìn)行建模仿真,分析流過SiC功率MOSFET的溝道電流與漏源極電流之間的差異,以及Si C功率MOSFET的輸出電容對(duì)開關(guān)損耗的真實(shí)影響,并用實(shí)驗(yàn)輔以證明,得到正確的開關(guān)損耗計(jì)算公式。當(dāng)今商業(yè)化的半導(dǎo)體器件仿真軟件中的遷移率模型大多數(shù)是基于Si器件的開發(fā),并不能體現(xiàn)SiO2/Si C界面處的陷阱對(duì)于溝道中載流子的散射影響。通過引入能正確反映界面陷阱對(duì)載流子作用的遷移率模型,利用半導(dǎo)體器件仿真軟件研究了界面陷阱對(duì)SiC功率MOSFET動(dòng)態(tài)特性的影響。位于Si O2/SiC界面處密度較高的陷阱,不僅俘獲SiC功率MOSFET溝道中的載流子,而且對(duì)溝道中的載流子形成散射、降低載流子的遷移率,因而嚴(yán)重影響了SiC功率MOSFET的開關(guān)特性。研究結(jié)果表明,隨著界面陷阱密度的增加,Si C功率MOSFET開通過程變慢,開通損耗隨之增加,而關(guān)斷過程加快,關(guān)斷損耗隨之減小;但是由于溝道載流子數(shù)量的減少、導(dǎo)通電阻的增加,總損耗是隨著界面陷阱密度的增加而增加。通過ATLAS的仿真結(jié)果與實(shí)驗(yàn)驗(yàn)證,證明了傳統(tǒng)開關(guān)損耗計(jì)算公式的不準(zhǔn)確之處。此外,采用ATLAS建立4H-SiC MOSFET模型,通過改變模型中的界面陷阱密度,定量研究界面陷阱對(duì)SiC器件特性的影響。對(duì)今后SiC功率MOSFET的研究和發(fā)展起到了一定的作用。
[Abstract]:With the development of science and technology, silicon carbide power devices have attracted much attention. Taking SiC power MOSFET as an example, its low on-resistance. The characteristics of high temperature resistance and high switching frequency make it favored by high voltage and high power switchgear. The true estimation of sic power MOSFET switching loss can accurately predict the maximum junction temperature efficiency of power electronic devices. Vital. So... The correct formula for calculating switching loss is particularly important. The traditional method of measuring switching loss lacks some physical understanding of power devices such as SiC power MOSFET. Fat. The traditional formula for calculating switching loss is questioned. The switching dynamics of SiC power MOSFET is modeled and simulated by the semiconductor device simulation software ATLAS. The difference between channel current and drain current of SiC power MOSFET and the real effect of output capacitance of SiC power MOSFET on switching loss are analyzed. With the help of experiments, the correct formula of switching loss is obtained. Most of the mobility models in the commercial simulation software of semiconductor devices are based on the development of Si devices. It can not reflect the effect of trapping at SiO2/Si C interface on carrier scattering in channel. By introducing a mobility model which can correctly reflect the interaction of interface trap with carrier. The influence of interface traps on the dynamic characteristics of SiC power MOSFET is studied by using semiconductor device simulation software. Not only the carrier in the SiC power MOSFET channel is captured, but also the carrier in the channel is scattered, which reduces the mobility of the carrier. As a result, the switching characteristics of SiC power MOSFET are seriously affected. The results show that the switching process of sic power MOSFET becomes slower with the increase of interface trap density. The turn-on loss increases and the turn-off process accelerates and the turn-off loss decreases. However, due to the decrease of the number of channel carriers and the increase of on-resistance, the total loss increases with the increase of interface trap density. The inaccuracy of the traditional formula for calculating the switching loss is proved. In addition, the 4H-SiC MOSFET model is established by ATLAS, and the interface trap density is changed by changing the interface trap density in the model. The effects of interface traps on the characteristics of SiC devices are quantitatively studied, which will play an important role in the research and development of SiC power MOSFET in the future.
【學(xué)位授予單位】：安徽工業(yè)大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2017
【分類號(hào)】：TN386

【參考文獻(xiàn)】

相關(guān)期刊論文 前9條

1 李金平;王琨;;碳化硅基MOSFETs器件研究進(jìn)展[J];西安郵電大學(xué)學(xué)報(bào);2016年04期

2 劉建東;;電力電子技術(shù)在電力系統(tǒng)中的應(yīng)用[J];職業(yè)技術(shù);2015年06期

3 黃京才;白朝輝;;碳化硅器件發(fā)展概述[J];山西電子技術(shù);2011年04期

4 湯曉燕;張玉明;張義門;;4H-SiCn-MOSFET新型反型層遷移率模型[J];西安電子科技大學(xué)學(xué)報(bào);2011年01期

5 王守國(guó);張巖;;SiC材料及器件的應(yīng)用發(fā)展前景[J];自然雜志;2011年01期

6 張波;鄧小川;張有潤(rùn);李肇基;;寬禁帶半導(dǎo)體SiC功率器件發(fā)展現(xiàn)狀及展望[J];中國(guó)電子科學(xué)研究院學(xué)報(bào);2009年02期

7 蔣超,陳海民;電力電子器件發(fā)展概況及應(yīng)用現(xiàn)狀[J];世界電子元器件;2004年04期

8 張玉明,張義門,羅晉生;6H-SiC MOS場(chǎng)效應(yīng)晶體管的研制[J];固體電子學(xué)研究與進(jìn)展;2000年01期

9 謝勇;如何降低功率MOSFET的開關(guān)損耗[J];電工技術(shù)雜志;1995年04期

相關(guān)碩士學(xué)位論文 前3條

1 王偉;碳化硅MOSFET的特性及應(yīng)用研究[D];安徽工業(yè)大學(xué);2016年

2 吳海平;SiO_2/SiC界面特性研究[D];華中科技大學(xué);2004年

3 冷朝霞;減小MOSFET開關(guān)損耗的極間電容優(yōu)化仿真研究[D];西安理工大學(xué);2002年

，

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