本文關鍵詞： 高速無源電背板 串擾 抑制措施 協(xié)同仿真 驗證　出處：《國防科學技術大學》2015年碩士論文　論文類型：學位論文

【摘要】：無源電背板由PCB板和連接器構成,是高速板級互連系統(tǒng)中很復雜的情況。在背板互連中,串擾是眾多SI問題中關鍵的問題之一,在芯片、封裝、PCB和連接器等處都會出現(xiàn)串擾。隨著信號傳輸速率的提升,串擾更加惡化,甚至引發(fā)系統(tǒng)失效。目前,背板互連中的串擾問題尚未引起足夠重視,抑制串擾基本上也還停留在簡單憑借經驗的階段。近年來,基于電磁場的電路仿真工具在功能、性能和精度等多方面都取得了較大進展。因此,基于電磁仿真軟件對串擾的物理機制進行探究,提出新的串擾抑制方案,進而為高速電路的設計提供有效指導是極其迫切和必要的。本文圍繞高速無源電背板中的串擾問題進行了研究,涉及串擾的理論和評估手段、互連結構的建模和仿真優(yōu)化、串擾抑制措施、高速背板互連全鏈路的仿真與測試等。主要工作包括:(1)分析了串擾耦合機制、串擾時頻域仿真流程和時頻域串擾評估方法。(2)探究PCB設計中的基本要素對串擾的影響規(guī)律。(3)提出一種矩形諧振腔串擾抑制方法。通過仿真實驗驗證該方法對微帶線間和帶狀線間串擾抑制的有效性,并研究矩形諧振腔的結構參數對近端串擾的影響。(4)圍繞高速背板上連接器的設計進行仿真優(yōu)化以減小串擾。優(yōu)化連接器的引腳分配方式,包括信號/地引腳分配方式和TX/RX分配方式;對連接器的壓接孔及其殘樁進行分析、建模、仿真和優(yōu)化,研究了通過優(yōu)化結構改善串擾的方法。(5)結合前期的串擾抑制研究和工程需要,設計實現(xiàn)了一套25G背板實驗系統(tǒng)。在研究背板規(guī)范IEEE802.3bj/D1.3和OIF-CEI-03.0的基礎上,針對所設計的25G背板實驗系統(tǒng)搭建背板互連的全鏈路仿真模型和測試平臺,進行仿真和測試驗證,并對通道評估參數COM和ICN用Matlab進行編程計算。基于本課題的研究,為后續(xù)25G系統(tǒng)的研制提供了有價值的設計指導。
[Abstract]:Passive electric backplane is composed of PCB board and connector, which is a very complex case in high-speed board-level interconnection system. Crosstalk is one of the key problems in many SI problems in chip and package. Crosstalk will appear in PCB and connector. With the increase of signal transmission rate, crosstalk will worsen and even lead to system failure. At present, the crosstalk problem in backplane interconnection has not been paid enough attention to. In recent years, electromagnetic circuit simulation tools have made great progress in many aspects, such as function, performance and precision. Based on electromagnetic simulation software, the physical mechanism of crosstalk is explored, and a new crosstalk suppression scheme is proposed. It is extremely urgent and necessary to provide effective guidance for the design of high-speed circuit. This paper focuses on the crosstalk problem in high-speed passive electric backplane, involving the theory and evaluation method of crosstalk. Modeling and simulation optimization of interconnection structure, crosstalk suppression measures, simulation and testing of high-speed backplane interconnect all links, etc. The main work includes: 1) the crosstalk coupling mechanism is analyzed. Crosstalk time and frequency domain simulation flow and time-frequency domain crosstalk evaluation method. 2) explore the basic elements in the design of PCB to the crosstalk law. A rectangular resonator crosstalk suppression method is proposed, and the effectiveness of the proposed method is verified by simulation experiments on the crosstalk suppression between microstrip lines and banded lines. The influence of the structural parameters of the rectangular resonator on the near-end crosstalk is studied. (4) the design of the connector on the high-speed backplane is simulated and optimized to reduce the crosstalk, and the pin allocation mode of the connector is optimized. Including signal / ground pin allocation mode and TX/RX allocation mode; The paper analyzes, models, simulates and optimizes the pressure-joint hole and its residual pile of connectors, and studies the method of improving crosstalk by optimizing structure. A 25G backplane experimental system is designed and implemented. Based on the research of backplane specification IEEE802.3bj/D1.3 and OIF-CEI-03.0. The full-link simulation model and test platform of backplane interconnection are built for the 25G backplane experimental system, and the simulation and test verification are carried out. The parameters of channel evaluation COM and ICN are programmed by Matlab. Based on the research of this subject, valuable design guidance is provided for the further development of 25G system.
【學位授予單位】：國防科學技術大學
【學位級別】：碩士
【學位授予年份】：2015
【分類號】：TN41

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