本文關(guān)鍵詞：基于FPGA的圖像開發(fā)板硬件優(yōu)化設(shè)計及仿真　出處：《內(nèi)蒙古大學》2015年碩士論文　論文類型：學位論文

  更多相關(guān)文章： FPGA SDRAM 仿真 圖像處理

【摘要】：在當今社會,數(shù)字圖像處理技術(shù)己變得越米越重要,在機器人技術(shù)、自動駕駛技術(shù)、遙感、四軸飛行器等領(lǐng)域得到了廣泛的應用。而隨著大數(shù)據(jù)時代的到來,人們對于數(shù)據(jù)的處理速度、器件的小型化、成本的控制越來越高。而FPGA由于其強大的功能、設(shè)計的靈活性和更強的可靠性受到了廣泛的應用。而SDRAM的高速、低價、低技術(shù)門檻,在低端設(shè)計中也廣受青睞。本課題重點對基于FPGA (EP2C35)與SDRAM的數(shù)字圖像開發(fā)板進行優(yōu)化設(shè)計使其在133MHZ下正常運行,提供應用于小型機器人上體積更小、成本更低的設(shè)計方案。根據(jù)FPGA與SDRAM的電器特性和IBIS模型,使用Cadence電路分析設(shè)計軟件對設(shè)計進行指導和仿真驗證。提供了從OrCAD原理圖繪制、布線前仿真、PCB后仿真、布線后驗證一整套設(shè)計分析流程方案。最終在各方面達到了設(shè)計要求及設(shè)計目的。
[Abstract]:In today's society, digital image processing technology has become more and more important, in robotics technology, autopilot technology, remote sensing, four-axis aircraft and other fields have been widely used. But with the arrival of big data era. The speed of data processing, the miniaturization of devices and the control of cost are becoming higher and higher. However, FPGA has powerful functions. Design flexibility and greater reliability are widely used, while SDRAM's high speed, low cost, and low technical barriers. In the low-end design is also popular. This topic focuses on the digital image development board based on FPGA EP2C35) and SDRAM to optimize the design to make it run normally under 133MHZ. Provides smaller, cheaper design solutions for small robots based on the electrical characteristics of FPGA and SDRAM and the IBIS model. The Cadence circuit analysis and design software is used to guide and simulate the design. The schematic diagram of OrCAD is drawn, and the simulation before wiring is provided. After wiring, a set of design and analysis flow schemes are verified. Finally, the design requirements and design purposes are achieved in various aspects.
【學位授予單位】：內(nèi)蒙古大學
【學位級別】：碩士
【學位授予年份】：2015
【分類號】：TN791

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相關(guān)期刊論文 前2條

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本文編號：1425546