本文關(guān)鍵詞：超聲波霧化施液技術(shù)拋光硅片的表層損傷研究　出處：《江南大學(xué)》2015年碩士論文　論文類型：學(xué)位論文

  更多相關(guān)文章： 化學(xué)機(jī)械拋光 霧化施液 硅片 損傷檢測(cè) 亞表面損傷深度

【摘要】：隨著當(dāng)今時(shí)代半導(dǎo)體工業(yè)的不斷發(fā)展,硅單晶材料已經(jīng)成為了半導(dǎo)體器件和集成電路中極為重要的基礎(chǔ)功能材料,同時(shí)對(duì)硅片的表面質(zhì)量要求也在不斷提高�；瘜W(xué)機(jī)械拋光(CMP)是目前實(shí)現(xiàn)硅片表面平整化的主流技術(shù)之一,但是傳統(tǒng)CMP中存在著拋光液大量浪費(fèi)、材料去除不一致、磨粒分布不均等弊端。針對(duì)上述傳統(tǒng)CMP中存在的弊端,提出了超聲波霧化施液拋光方法,極大節(jié)省了拋光液的消耗量并進(jìn)一步提高了硅片的表面質(zhì)量。然而由于拋光工藝本身的原因仍會(huì)不可避免地對(duì)硅片表層造成損傷,影響晶片的使用性能。因此有必要對(duì)霧化施液技術(shù)拋光硬脆晶體的表層損傷展開(kāi)研究,進(jìn)一步完善基于表面精度和質(zhì)量要求的評(píng)價(jià)手段和檢測(cè)方法。對(duì)霧化施液拋光過(guò)程中硅片的表層損傷形式進(jìn)行了檢測(cè)和分析。利用掃描電子顯微鏡(SEM)、原子力顯微鏡(AFM)等儀器對(duì)硅片的表面質(zhì)量進(jìn)行了定量和定性分析,發(fā)現(xiàn)研磨硅片經(jīng)霧化施液拋光后表面粗糙度小于10nm,表面無(wú)劃痕和破碎現(xiàn)象。運(yùn)用化學(xué)腐蝕法、顯微拉曼光譜法分別對(duì)硅片亞表面的微裂紋、位錯(cuò)和殘余應(yīng)力等損傷進(jìn)行了分析和表征,發(fā)現(xiàn)微裂紋損傷隨表面到亞表面深度的增加而愈加嚴(yán)重;硅片邊沿處的位錯(cuò)密度要小于其他區(qū)域,未出現(xiàn)位錯(cuò)排和小角度晶界等嚴(yán)重缺陷,增大霧化器的功率能有效降低位錯(cuò)蝕坑的密度;硅片經(jīng)霧化施液拋光后表面會(huì)引入殘余拉應(yīng)力,殘余應(yīng)力沿硅片對(duì)角線方向呈對(duì)稱分布,從中心至邊沿處逐漸增大。采用差動(dòng)蝕刻速率法測(cè)量了研磨硅片經(jīng)霧化施液拋光后的亞表面損傷深度,并在相同工藝參數(shù)下和傳統(tǒng)CMP進(jìn)行了對(duì)比,結(jié)果表明:在霧化施液CMP系統(tǒng)下,特種拋光液加工的硅片亞表面損傷深度(0.83μm)小于市購(gòu)的SSP-L型拋光液(0.99μm);和傳統(tǒng)CMP相比較時(shí)材料去除率稍低,但加工出的硅片損傷深度更小。對(duì)霧化施液技術(shù)拋光硅片表層損傷的產(chǎn)生機(jī)理進(jìn)行了分析,認(rèn)為損傷層主要由水解層、缺陷層、殘余應(yīng)力層構(gòu)成。以亞表面損傷深度、表面粗糙度、材料去除率為綜合評(píng)價(jià)指標(biāo),建立正交試驗(yàn)矩陣分析模型進(jìn)行了拋光工藝參數(shù)的優(yōu)化。分析出工藝參數(shù)對(duì)綜合評(píng)價(jià)指標(biāo)的影響主次順序?yàn)殪F化器電壓、拋光壓力、拋光墊轉(zhuǎn)速,得到了工藝參數(shù)的最優(yōu)組合方案為霧化器電壓50V、拋光墊轉(zhuǎn)速60r/min、拋光壓力8psi,此時(shí)硅片的材料去除率為166.487 nm/min、亞表面損傷深度為0.83μm、表面粗糙度為4.9nm。設(shè)計(jì)單因素試驗(yàn)研究了工藝參數(shù)對(duì)亞表面損傷深度的影響規(guī)律,結(jié)果表明:增大霧化器的電壓可以有效降低硅片的損傷深度,而拋光墊轉(zhuǎn)速和拋光壓力分別存在一個(gè)最佳的參數(shù)使得損傷深度達(dá)到最小。
[Abstract]:With the development of semiconductor industry, silicon single crystal has become an important basic functional material in semiconductor devices and integrated circuits. Chemical and mechanical polishing (CMP) is one of the main technologies to realize the surface leveling of silicon wafers, but there is a lot of waste of polishing liquid in traditional CMP. The removal of materials is inconsistent and the distribution of abrasive particles is not equal. In view of the disadvantages of the traditional CMP mentioned above, the ultrasonic atomization polishing method is put forward. It greatly saves the consumption of polishing liquid and further improves the surface quality of silicon wafer. However, due to the polishing process itself, it will inevitably cause damage to the surface layer of silicon wafer. Therefore, it is necessary to study the surface damage of hard and brittle crystal polishing by atomization. The evaluation method and detection method based on surface precision and quality requirements were further improved. The surface damage forms of silicon wafer during atomization polishing were detected and analyzed. Scanning electron microscope (SEM) was used to detect and analyze the damage form of silicon wafer. The surface quality of the wafer was quantitatively and qualitatively analyzed by atomic force microscope (AFM) and other instruments. It was found that the surface roughness of the wafer was less than 10nm after atomized polishing. The microcracks, dislocations and residual stresses on the subsurface of silicon wafers were analyzed and characterized by chemical etching and Raman spectroscopy. It is found that the microcrack damage becomes more and more serious with the increase of the depth from the surface to the sub-surface. The dislocation density at the edge of the wafer is smaller than that in other regions and there are no serious defects such as dislocation row and small angle grain boundary. Increasing the power of the atomizer can effectively reduce the density of the dislocation etch pit. The residual tensile stress will be introduced into the surface of the wafer after atomization and the residual stress will be distributed symmetrically along the diagonal direction of the wafer. The subsurface damage depth of the polished silicon wafer was measured by differential etching rate method from the center to the edge, and compared with the traditional CMP under the same process parameters. The results showed that the damage depth of subsurface of silicon wafer processed by special polishing liquid was 0.83 渭 m in atomized liquid CMP system, and 0.99 渭 m of SSP-L type polishing liquid was less than that of SSP-L type polishing liquid purchased on the market. Compared with traditional CMP, the material removal rate is slightly lower, but the damage depth of silicon wafer is smaller. The mechanism of surface damage of silicon wafer polished by atomization is analyzed, and it is considered that the damage layer is mainly hydrolyzed layer. Defect layer, residual stress layer. The subsurface damage depth, surface roughness and material removal rate are taken as the comprehensive evaluation index. The orthogonal test matrix analysis model was established to optimize the polishing process parameters, and the influence of the process parameters on the comprehensive evaluation index was analyzed in the order of atomizer voltage, polishing pressure and polishing pad speed. The optimal combination of process parameters is as follows: atomizer voltage 50 V, polishing pad speed 60 r / min, polishing pressure 8 psi. At this time, the material removal rate of silicon wafer is 166.487 nm / min, and the depth of subsurface damage is 0.83 渭 m. The surface roughness is 4.9 nm. The influence of process parameters on the depth of subsurface damage is studied by single factor experiment. The results show that increasing the voltage of atomizer can effectively reduce the damage depth of silicon wafer. However, there is an optimum parameter of the rotation speed and polishing pressure of the polishing pad to minimize the damage depth.
【學(xué)位授予單位】：江南大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：TN304.12

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