本文關(guān)鍵詞：對(duì)反熔絲結(jié)構(gòu)FPGA的分析與研究　出處：《遼寧大學(xué)》2015年碩士論文　論文類型：學(xué)位論文

  更多相關(guān)文章： 反熔絲 FPGA 電荷泵 I/O接口 JTAG

【摘要】：FPGA(Field Programmable Gate Array)即現(xiàn)場(chǎng)可編程門陣列,它的主要構(gòu)成因素包括很多的可配置邏輯單元、復(fù)雜交錯(cuò)的可編程的互聯(lián)資源、還有就是一些可編程的I/O接口電路,它可以通過用戶的自主編程實(shí)現(xiàn)各種功能。隨著FPGA設(shè)計(jì)技術(shù)和工藝技術(shù)的提高,反熔絲FPFA因其非易失性、功耗低、集成度高、性能穩(wěn)定、抗總劑量等優(yōu)點(diǎn)得到了世界電子行業(yè)的廣泛關(guān)注和應(yīng)用,包括應(yīng)用到高可靠、高保密性的軍用和航空航天領(lǐng)域。本文分析了國(guó)內(nèi)國(guó)外的反熔絲FPGA的成果和發(fā)展趨勢(shì),深入的探討了反熔絲的的基本結(jié)構(gòu)及工作方式,探討了不同類型的反熔絲工作原理。反熔絲分為ONO型和MTM型,著重的分析了ONO反熔絲的結(jié)構(gòu),熔斷原理模型,分析了它們各自的編程過程,編程電壓,編程后的歐姆特性和版圖布局,此外,還討論了反熔絲陣列的編程方法和過程。同時(shí)簡(jiǎn)述了FPGA的整體結(jié)構(gòu)和電路組成,包括可編程邏輯模塊CLB,I/O模塊,布線資源,時(shí)鐘網(wǎng)絡(luò)和JTAG。同時(shí)為了更好的理解反熔絲的工作,以及更加直觀的表述反熔絲FPGA的工作原理,還進(jìn)行了垂直分段的反熔絲編程下載的驗(yàn)證。內(nèi)部主要模塊的仿真:包括可編程邏輯模塊的功能仿真,即C_Moudle、D_Moudle、S_Moudle功能仿真以及電路的延時(shí)仿真;電荷泵的仿真,包括振蕩器變頻電路、輔助上電電路和穩(wěn)壓電路的仿真,設(shè)計(jì)出了一個(gè)高效率低功耗的電荷泵;對(duì)I/O的仿真,完成了I/O在仿真工藝角TT、FF、SS和三溫狀態(tài)下輸入輸出的功能驗(yàn)證,并對(duì)照了Actel SX-A Family FPGA公司的數(shù)據(jù)手冊(cè),基本達(dá)到要求,同時(shí)還做了I/O反熔絲點(diǎn)控制功能的驗(yàn)證,包含可編程的斜率控制電路、上拉下拉電阻的控制,鉗位電壓功能的驗(yàn)證;JTAG的仿真,簡(jiǎn)要的闡述了JTAG的工作方法,著重討論了JTAG的核心控制功能TAP狀態(tài)機(jī)的驗(yàn)證。最后完成了全電路模塊的版圖設(shè)計(jì),本版圖采用的是TSMC(臺(tái)灣積體電路制造公司,簡(jiǎn)稱臺(tái)積電)0.18um工藝,內(nèi)核電壓VCCA為1.8V,I/O電壓VCCI是3.3V。此文章為以后的反熔絲FPGA的分析研究提供了參考。
[Abstract]:FPGA(Field Programmable Gate array, a field programmable gate array, consists of many configurable logic units. Complex interlaced programmable interconnect resources, and some programmable I / O interface circuits, it can achieve a variety of functions through the independent programming of users. With the improvement of FPGA design technology and process technology. Anti-fuse FPFA has been widely concerned and applied in the electronic industry in the world for its advantages of non-volatile, low power consumption, high integration, stable performance, total dose resistance and so on, including its application to high reliability. In this paper, the achievements and development trend of anti-fuse FPGA at home and abroad are analyzed, and the basic structure and working mode of anti-fuse are discussed. The working principle of different types of anti-fuse wire is discussed. The anti-fuse wire is divided into ONO type and MTM type. The structure of ONO anti-fuse wire, the model of fuse principle and their programming process are analyzed emphatically. The programming voltage, ohmic characteristics and layout after programming are also discussed. In addition, the programming method and process of anti-fuse array are discussed, and the overall structure and circuit composition of FPGA are briefly described. Includes the programmable logic module CLBU I / O module, wiring resources, clock network and JTAG. meanwhile, for a better understanding of the anti-fuse work. And more intuitively describes the working principle of the anti-fuse FPGA, also carried out the vertical section of anti-fuse programming download verification. Internal simulation of the main modules, including the functional simulation of programmable logic module. In other words, the function simulation and the circuit delay emulation of the C _ S _ Moudlee _ D _ D _ D _ D _ D _ S _ S _ S _ Moudle; A charge pump with high efficiency and low power consumption is designed by simulation of charge pump, including oscillator frequency conversion circuit, auxiliary power up circuit and voltage stabilizer circuit. The simulation of I / O has completed the functional verification of I / O in the simulation process angle TTFFFFSS and the three-temperature state of input and output. Compared with the data manual of Actel SX-A Family FPGA, it basically meets the requirements. At the same time, the I / O anti-fuse point control function is verified. Includes programmable slope control circuit, up pull down resistance control, clamp voltage function verification; JTAG simulation, briefly describes the working methods of JTAG, focuses on the core control function of JTAG TAP state machine verification. Finally, the layout design of the whole circuit module is completed. TSMC (Taiwan Integrated Circuit Manufacturing Co., Ltd., abbreviated as TSMC 0.18um process) is used in this paper. The core voltage VCCA is 1.8V. The I / O voltage VCCI is 3.3 V. this paper provides a reference for the analysis and study of anti-fuse FPGA in the future.
【學(xué)位授予單位】：遼寧大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：TN791

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本文編號(hào)：1423956