本文關(guān)鍵詞：具有雙重結(jié)構(gòu)的多通道任意波形發(fā)生器研究　出處：《河南科技大學(xué)》2017年碩士論文　論文類型：學(xué)位論文

  更多相關(guān)文章： 雙重結(jié)構(gòu) 直接數(shù)字合成 數(shù)據(jù)順序輸出 現(xiàn)場(chǎng)可編程門陣列

【摘要】：任意波形發(fā)生器廣泛應(yīng)用于數(shù)字電視,航空航天等領(lǐng)域。目前大多數(shù)任意波形發(fā)生器主要采用DDS技術(shù)實(shí)現(xiàn),該技術(shù)從相位的角度出發(fā)進(jìn)行頻率合成,具有頻率分辨率高、相位精確、頻率捷變等諸多優(yōu)點(diǎn),因而得到廣泛應(yīng)用。隨著電子技術(shù)的發(fā)展及應(yīng)用需求的提高,對(duì)信號(hào)質(zhì)量的要求越來越高,而DDS輸出頻譜中含有較多雜散分量,不能很好地滿足一些特殊領(lǐng)域的應(yīng)用需求。針對(duì)上述問題,本文提出了一種具有雙重結(jié)構(gòu)的多通道任意波形發(fā)生器設(shè)計(jì),該設(shè)計(jì)具有DDS輸出及數(shù)據(jù)順序輸出功能,以滿足波形發(fā)生器的寬范圍應(yīng)用。本設(shè)計(jì)主要包括:DDS輸出模塊、數(shù)據(jù)順序輸出模塊、人機(jī)交互模塊、通信模塊和模擬電路等模塊�；贒DS原理采用FPGA(Field-Programmable Gate Array,現(xiàn)場(chǎng)可編程邏輯門陣列)構(gòu)建DDS頻率合成器,對(duì)FPGA內(nèi)部RAM塊進(jìn)行整合,建立數(shù)據(jù)查找表單元,通過間隔尋址數(shù)據(jù)查找表以輸出波形數(shù)據(jù),實(shí)現(xiàn)DDS信號(hào)輸出;利用DDS頻率合成技術(shù)產(chǎn)生數(shù)據(jù)順序輸出模塊的數(shù)據(jù)輸出時(shí)鐘,采用SDRAM作為數(shù)據(jù)順序輸出的數(shù)據(jù)存儲(chǔ)器,根據(jù)輸出時(shí)鐘逐個(gè)輸出波形數(shù)據(jù),并通過改變數(shù)據(jù)輸出時(shí)鐘來控制信號(hào)輸出頻率,實(shí)現(xiàn)頻率可調(diào)的數(shù)據(jù)順序輸出;利用FPGA構(gòu)建人機(jī)交互模塊的彩色液晶顯示驅(qū)動(dòng)單元,并驅(qū)動(dòng)片外顯示緩存SRAM,基于STM32F407進(jìn)行人機(jī)交互界面設(shè)計(jì),通過觸摸單元識(shí)別用戶操作,完成人機(jī)交互模塊的設(shè)計(jì);采用STM32F407外接USB3300作為USB通信單元以實(shí)現(xiàn)本系統(tǒng)與PC之間波形數(shù)據(jù)的傳輸,基于FPGA與STM32F407之間的FSMC通信總線,完成兩個(gè)核心控制器之間的數(shù)據(jù)及控制命令傳輸;通過D/A轉(zhuǎn)換電路、幅度調(diào)節(jié)電路和濾波電路等,對(duì)信號(hào)進(jìn)行調(diào)理和轉(zhuǎn)換,實(shí)現(xiàn)模擬電路設(shè)計(jì)。通過對(duì)雙重結(jié)構(gòu)的任意波形發(fā)生器的功能及性能測(cè)試實(shí)驗(yàn)表明:該任意波形發(fā)生器可以實(shí)現(xiàn)多通道任意波形輸出,幅度調(diào)節(jié)范圍可以達(dá)到0Vpp~20Vpp。DDS最大輸出頻率達(dá)到10MHz,且具有良好的頻率調(diào)節(jié)特性;數(shù)據(jù)順序輸出最大輸出頻率可以達(dá)到5MHz,相對(duì)DDS輸出具有較好的頻譜特性及信號(hào)質(zhì)量。具有雙重結(jié)構(gòu)的多通道任意波形發(fā)生器適用于多種應(yīng)用領(lǐng)域,擴(kuò)展了DDS波形發(fā)生器的應(yīng)用范圍,具有良好的應(yīng)用價(jià)值。
[Abstract]:Arbitrary waveform generators are widely used in digital television, aerospace and other fields. At present, most of the arbitrary waveform generators are mainly implemented by DDS technology, which performs frequency synthesis from the angle of phase. With the advantages of high frequency resolution, precise phase, frequency agility and so on, it has been widely used. With the development of electronic technology and the improvement of application requirements, the demand for signal quality is becoming higher and higher. However, the output spectrum of DDS contains more stray components, which can not meet the needs of some special applications. This paper presents a design of a multi-channel arbitrary waveform generator with dual structure, which has the functions of DDS output and data sequential output. In order to meet the wide application of waveform generator. This design mainly includes: DDS output module, data sequence output module, human-computer interaction module. Communication module and analog circuit module. Based on the principle of DDS, FPGA(Field-Programmable Gate Array is adopted. Field Programmable Logic Gate Array (FPGA) constructs DDS frequency synthesizer, integrates RAM blocks within FPGA, establishes data lookup form elements, and outputs waveform data through interval addressing data lookup table. The output of DDS signal is realized; The data output clock of the data sequence output module is generated by DDS frequency synthesis technology, and the waveform data is output one by one by using SDRAM as the data memory output in the data order. The signal output frequency is controlled by changing the data output clock, and the frequency adjustable data sequence output is realized. The color LCD driver unit of human-computer interaction module is constructed by using FPGA, and the out-of-chip display buffer is driven. The interface of human-computer interaction is designed based on STM32F407. The user operation is identified by the touch unit, and the man-machine interaction module is designed. The STM32F407 external USB3300 is used as the USB communication unit to realize the waveform data transmission between the system and PC. Based on the FSMC communication bus between FPGA and STM32F407, the data and control command transmission between the two core controllers is completed. Through D / A conversion circuit, amplitude adjusting circuit and filter circuit, the signal is adjusted and converted. The function and performance of the dual structure arbitrary waveform generator are tested. The results show that the multi-channel arbitrary waveform generator can be used to output arbitrary waveform. The range of amplitude regulation can reach 0V pp-20Vpp.DDS, the maximum output frequency is 10MHz, and it has good frequency regulation characteristic. The maximum output frequency of data sequential output can reach 5 MHz, compared with DDS output, it has better spectrum characteristics and signal quality. The multi-channel arbitrary waveform generator with dual structure is suitable for many applications. It extends the application range of DDS waveform generator and has good application value.
【學(xué)位授予單位】：河南科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2017
【分類號(hào)】：TN741

【參考文獻(xiàn)】

相關(guān)期刊論文 前10條

1 汪海燕;;一種DDS頻率源中相位截尾誤差的算法[J];西昌學(xué)院學(xué)報(bào)(自然科學(xué)版);2016年03期

2 韋孟輝;徐巧玉;王紅梅;;精密相位控制的多通道任意波形發(fā)生器設(shè)計(jì)[J];河南科技大學(xué)學(xué)報(bào)(自然科學(xué)版);2016年01期

3 王安標(biāo);劉春波;田勇;;四通道高電壓任意波形發(fā)生器設(shè)計(jì)與制作[J];測(cè)控技術(shù);2015年08期

4 谷佳琪;李超;王洪娟;;典型諧波分析與治理措施[J];節(jié)能;2015年07期

5 陳紅;謝勤嵐;;多功能波形發(fā)生器設(shè)計(jì)[J];現(xiàn)代電子技術(shù);2015年12期

6 張熹;;基于Qt實(shí)現(xiàn)USB CDC便攜式設(shè)備串口通信客戶端設(shè)計(jì)[J];電子產(chǎn)品世界;2015年05期

7 徐巧玉;趙偉超;王軍委;王紅梅;;基于ARM+FPGA的遠(yuǎn)程顯示終端設(shè)計(jì)[J];計(jì)算機(jī)測(cè)量與控制;2015年03期

8 肖林京;于鵬杰;于志豪;常龍;岳明臣;;基于STM32和emWin圖形庫(kù)的液晶顯示系統(tǒng)設(shè)計(jì)[J];電視技術(shù);2015年01期

9 曾浩;張祺;鄭斯凱;;基于STM32F407的圖像遠(yuǎn)程采集終端[J];工業(yè)控制計(jì)算機(jī);2014年11期

10 蘇淑靖;吳征;;基于FPGA+DDS的位同步時(shí)鐘恢復(fù)設(shè)計(jì)與實(shí)現(xiàn)[J];電子技術(shù)應(yīng)用;2014年08期

相關(guān)碩士學(xué)位論文 前10條

1 范海斌;L波段限幅衰減組件的設(shè)計(jì)與分析[D];成都理工大學(xué);2016年

2 楊帆;200MSa/s任意波形發(fā)生器的設(shè)計(jì)與實(shí)現(xiàn)[D];電子科技大學(xué);2015年

3 葉顯;高性能任意波形發(fā)生器設(shè)計(jì)[D];華中師范大學(xué);2014年

4 辛凱華;基于DDS的任意波形發(fā)生器的研究[D];山東理工大學(xué);2014年

5 毛群;基于DDS技術(shù)的三相信號(hào)源設(shè)計(jì)[D];電子科技大學(xué);2014年

6 張坤;任意波形發(fā)生器設(shè)計(jì)及實(shí)現(xiàn)[D];哈爾濱工程大學(xué);2013年

7 吳陸曉東;任意波形發(fā)生器數(shù)字模塊的硬件設(shè)計(jì)[D];電子科技大學(xué);2013年

8 王淵;PXI雙通道40MSPS任意波形發(fā)生器硬件設(shè)計(jì)[D];電子科技大學(xué);2013年

9 周鵬驥;LXI 1GSPS任意波形發(fā)生器模擬通道設(shè)計(jì)[D];電子科技大學(xué);2013年

10 楊陽(yáng);基于FPGA的多波形發(fā)生器的設(shè)計(jì)[D];哈爾濱理工大學(xué);2013年

，

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