本文選題：FPGA + SPWM��； 參考：《杭州電子科技大學(xué)》2017年碩士論文

【摘要】：正弦脈寬調(diào)制(Sinusoidal Pulse Width Modulation,SPWM)逆變器是一種廣泛應(yīng)用于電機(jī)驅(qū)動(dòng)、直流電源并網(wǎng)等逆變系統(tǒng)之中的完成直流交流轉(zhuǎn)換的產(chǎn)品,逆變控制器和逆變主電路的設(shè)計(jì)優(yōu)劣直接決定了SPWM逆變器的性能。本文針對(duì)現(xiàn)有逆變器設(shè)計(jì)方案中存在的不足之處,提出了采用現(xiàn)場(chǎng)可編程門(mén)陣列(Field Programmable Gate Array,FPGA)硬件器件和Nios Ⅱ軟核處理器來(lái)設(shè)計(jì)高質(zhì)量SPWM逆變器的研究思路。主要研究工作如下:(1)針對(duì)目前大多數(shù)SPWM逆變器采用專(zhuān)用芯片生成SPWM波時(shí)存在的不利于系統(tǒng)二次開(kāi)發(fā)、系統(tǒng)體積大且復(fù)雜程度高的問(wèn)題,本文根據(jù)FPGA使用方式靈活、運(yùn)行速度快、資源豐富、可并行運(yùn)行的特點(diǎn),采用FPGA來(lái)產(chǎn)生SPWM波,大大降低開(kāi)發(fā)周期和難度。(2)采用Nios Ⅱ軟核處理器設(shè)計(jì)SPWM逆變器的核心CPU處理器。在主流FPGA器件都支持Nios Ⅱ軟核的前提下,采用硬件設(shè)計(jì)和軟件設(shè)計(jì)相結(jié)合的方式設(shè)計(jì)逆變器的核心處理器。使用Qsys系統(tǒng)集成工具設(shè)計(jì)處理器的硬件部分,同時(shí)使用Nios Ⅱ IDE集成開(kāi)發(fā)環(huán)境完成處理器的軟件編程。(3)采用自頂向下,按功能劃分設(shè)計(jì)模塊的思路設(shè)計(jì)基于FPGA的SPWM逆變器。將逆變器劃分為三角波生成模塊、DDS正弦波生成模塊、SPWM波生成模塊、死區(qū)模塊、Nios Ⅱ處理器模塊、驅(qū)動(dòng)模塊、濾波模塊、反饋模塊等主要功能模塊,然后就各個(gè)模塊需要實(shí)現(xiàn)的功能,設(shè)計(jì)相應(yīng)的硬件電路,最后連接各個(gè)模塊組成完整的系統(tǒng)。模塊化的設(shè)計(jì)方案大大降低了設(shè)計(jì)難度,獨(dú)立的功能模塊也有利于后期維護(hù)和升級(jí)。最后將設(shè)計(jì)基于FPGA的SPWM逆變器進(jìn)行仿真測(cè)試及實(shí)物測(cè)試,測(cè)試逆變器的各項(xiàng)功能和性能。實(shí)驗(yàn)結(jié)果表明,依照本文設(shè)計(jì)方案的逆變器結(jié)構(gòu)簡(jiǎn)單、體積小、集成度高,且能有效完成逆變器基本功能,該方案是切實(shí)可行的。
[Abstract]:Sinusoidal Pulse Width Modulation (SPWM) inverter is a kind of inverter which is widely used in the inverter system such as motor drive, DC power supply and other inverter system. The design of inverter controller and inverter main circuit directly determines the performance of SPWM inverter. This paper is designed for the current inverter design. The shortcomings of the scheme are presented, and the research ideas for the design of high quality SPWM Inverters by using Field Programmable Gate Array (FPGA) hardware and Nios II soft core are proposed. The main research work is as follows: (1) the existence of most SPWM inverters using special chips to generate SPWM waves is not. In favor of the two development of the system and the problem of large and complex system, this paper is based on the flexible use of FPGA, fast running speed, rich resources, and parallel running characteristics, using FPGA to generate SPWM waves, greatly reducing the development cycle and difficulty. (2) the core CPU processor of SPWM inverter is designed by using Nios II soft core processor. Under the premise of supporting the Nios II soft core, the flow FPGA device designs the core processor of the inverter with the combination of hardware design and software design. Using the Qsys system integration tool to design the hardware part of the processor, and use the Nios II IDE integrated development environment to complete the software programming of the processor. (3) using the top down, the function of the processor. The design module is divided into SPWM inverter based on FPGA. The inverter is divided into triangular wave generation module, DDS sine wave generation module, SPWM wave generation module, dead zone module, Nios II processor module, driving module, filter module, feedback module and other main functional blocks, and then the function of each module needs to be realized. The hardware circuit, finally connected with each module to form a complete system. The modular design scheme greatly reduces the design difficulty. The independent functional module is also conducive to the later maintenance and upgrading. Finally, the design of the FPGA based SPWM inverter is designed to test and test the functions and performance of the inverter. The experimental results are tested. It is shown that the inverter is simple in structure, small in size and high in integration, and can effectively accomplish the basic functions of inverter.

【學(xué)位授予單位】：杭州電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2017
【分類(lèi)號(hào)】：TM343;TM464

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