變電站合并單元測試設(shè)備校驗系統(tǒng)及其實現(xiàn)
發(fā)布時間:2018-03-18 13:49
本文選題:智能變電站 切入點:合并單元測試設(shè)備 出處:《電力系統(tǒng)自動化》2017年19期 論文類型:期刊論文
【摘要】:針對變電站合并單元測試設(shè)備技術(shù)性能中"延時特性"和"準(zhǔn)確度"兩項關(guān)鍵的測試功能指標(biāo)缺乏有效校驗手段的問題,提出了一種針對變電站合并單元測試設(shè)備技術(shù)性能的校驗方法,研制了相關(guān)校驗系統(tǒng),介紹了系統(tǒng)構(gòu)成、技術(shù)指標(biāo)。該校驗系統(tǒng)基于高性能ARM處理器+現(xiàn)場可編程門陣列(FPGA)+高精度AD芯片的硬件系統(tǒng),設(shè)計了電壓、電流快速采樣前置電路以減小采樣延時誤差,應(yīng)用了定頻采樣高精度幅值和相位算法以實現(xiàn)對采樣信號的高精度測量,設(shè)置了精確靈活的延時特性測試策略。隨后,應(yīng)用該校驗系統(tǒng)開展了合并單元測試設(shè)備比對性測試,基本解決了變電站合并單元測試設(shè)備核心性能無法檢測的實際問題。
[Abstract]:In order to solve the problem that the two key test function indexes of "delay characteristic" and "accuracy" in the technical performance of substation merging unit test equipment are short of effective verification means, This paper presents a calibration method for the technical performance of the test equipment for substation merging unit, develops a related calibration system, and introduces the structure of the system. Technical specifications. The calibration system is based on the hardware system of high precision AD chip with high performance ARM processor field programmable gate array (FPGA). The voltage and current sampling precircuits are designed to reduce the sampling delay error. The high precision amplitude and phase algorithm of constant frequency sampling is applied to realize the high precision measurement of the sampling signal, and the accurate and flexible delay characteristic test strategy is set up. Then, the combined unit test equipment is tested by the calibration system. It basically solves the practical problem that the core performance of substation merging unit test equipment can not be detected.
【作者單位】: 國網(wǎng)湖南省電力公司電力科學(xué)研究院;湖南省湘電試驗研究院有限公司;
【基金】:國網(wǎng)湖南省電力公司科技項目(5216A5140026)的資助
【分類號】:TM63
,
本文編號:1629846
本文鏈接:http://sikaile.net/kejilunwen/dianlidianqilunwen/1629846.html
最近更新
教材專著