基于NetFPGA 10G的PON系統(tǒng)設(shè)計(jì)與實(shí)現(xiàn)
[Abstract]:With the progress of science and technology and the development of information industry, the demand for network service quality and network bandwidth has been improved. However, the bandwidth of core network grows rapidly in recent years, but the access network between core network and user lags behind. As one of the optical fiber access technologies, the Ethernet passive optical network (Ethernet Passive OpticalNetwork, EPON) technology effectively utilizes the valuable resources of the existing Ethernet, and has the advantages of low cost, high bandwidth, simple maintenance and so on. Is considered to be one of the best solutions to the "last kilometer" problem. NetFPGA is a low cost open source network testing platform designed and developed by Stanford University. The platform not only has the high speed processing of hardware, but also has the flexibility of software programmable and reusable. In this paper, the existing simulation environment of EPON system is analyzed, the key technology of EPON and the application and development of NetFPGA10G platform are deeply studied, and a design scheme of PON system based on NetFPGA10G platform is put forward. The main contents of this paper are as follows: (1) the research background of EPON system and NetFPGA10G platform and the current research situation at home and abroad have been deeply investigated. This paper introduces the hierarchical model and working principle of EPON system, analyzes the existing simulation environment of EPON, and discusses the necessity of building prototype of PON system on NetFPGA10G platform. (2) the function module of NetFPGA10G data path is introduced, the data processing flow is deeply analyzed, and the AXI4-Stream bus is studied for the communication between modules. (3) according to the difference of the function between the optical line terminal (Optical Line Terminal, OLT) and the optical network unit (Optical Network Unit, ONU) in the EPON system, the design scheme is given respectively. The scheme is chosen to work on the same level as the PON system in the OSI reference model. And the structure of the most concise Reference NIC as a reference project; The modularization design idea is adopted to reduce the complexity of the function module, and the three-stage state machine is used in the programming process, which reduces the interference of the input signal to the output signal. The core processing module adopts back-end buffer mechanism to control the time slot of data transmission. This scheme uses Verilog HDL to program, combines ISE,XPS and other tools to embed the core module of OLT/ONU into the NetFPGA10G data path, realizes the up / down data path of EPON system, MPCP protocol and Ethernet exchange function. The EPON system is simulated and verified.
【學(xué)位授予單位】:河北工程大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2014
【分類(lèi)號(hào)】:TP393.11
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