【摘要】：硬件木馬是嵌入在集成電路中的冗余電路單元，能夠在一定條件下激活并導(dǎo)致芯片功能失效或信息泄露，在集成電路設(shè)計制造的各個環(huán)節(jié)都有可能被嵌入這種惡意的木馬電路硬件木馬的出現(xiàn)給芯片安全性帶來嚴重威脅，其相關(guān)檢測技術(shù)日漸成為信息安全領(lǐng)域的研究熱點，得到了國際上的廣泛關(guān)注 本文主要開展了基于功耗電磁等側(cè)信道分析技術(shù)的相關(guān)研究工作，首先研究了基于組合邏輯時序邏輯的硬件木馬載體電路的設(shè)計方法，重點介紹了組合邏輯型硬件木馬在ISCAS’89基準電路s713中的植入方法針對應(yīng)用于IP核版權(quán)保護中的時序型硬件木馬激活時間不足的問題提出了一種改進結(jié)構(gòu)，基于高級加密標準（Advanced Encryption Standard，AES）算法電路驗證了這種結(jié)構(gòu)的有效性仿真結(jié)果顯示，，這種方法能夠在電路面積減少0.123%的基礎(chǔ)上使木馬的激活時間提高約120倍 在此基礎(chǔ)上，設(shè)計并實現(xiàn)了基于FPGA的檢測平臺，提出了包括降噪小信號提取等有關(guān)平臺的驗證與優(yōu)化方法，設(shè)計了硬件木馬的檢測流程最后介紹了基于側(cè)信道分析的數(shù)據(jù)處理算法，重點針對主成分分析（Principal ComponentAnalysis, PCA）算法開展研究工作，通過提取基于時序型硬件木馬的載體電路在木馬激活前后的側(cè)信道信息建立電路的電磁輻射模型，在此基礎(chǔ)之上驗證了PCA算法對于檢測時序型硬件木馬的有效性 實驗結(jié)果表明，基于本文所設(shè)計的硬件木馬檢測平臺，PCA算法能夠有效檢測占電路總面積4%以上的硬件木馬電路
[Abstract]:The hardware Trojan is a redundant circuit unit embedded in the integrated circuit, which can be activated under certain conditions and lead to the failure of the function of the chip or the disclosure of information. In the integrated circuit design and manufacture of each link is likely to be embedded in this malicious Trojan circuit hardware Trojan has brought a serious threat to the security of the chip, its related detection technology has become a research hotspot in the field of information security. This paper mainly focuses on the research of power dissipation electromagnetic equal-side channel analysis technology. Firstly, the design method of hardware Trojan horse carrier circuit based on combinational logic sequential logic is studied. This paper mainly introduces the implanting method of combinational logic hardware Trojan in ISCAS'89 reference circuit s713. Aiming at the problem of insufficient activation time of sequential hardware Trojan used in IP core copyright protection, this paper proposes an improved structure. Based on the advanced encryption standard (Advanced Encryption Standard,AES) algorithm circuit, the simulation results show that the structure is effective. This method can reduce the circuit area by 0.123% and increase the activation time of Trojan horse by about 120 times. On this basis, the detection platform based on FPGA is designed and implemented. In this paper, the verification and optimization methods of related platforms, including noise reduction and small signal extraction, are put forward. The detection flow of hardware Trojan horse is designed. Finally, the data processing algorithm based on side channel analysis is introduced, especially for principal component analysis (Principal ComponentAnalysis,). PCA) algorithm, the electromagnetic radiation model of the circuit is established by extracting the side channel information of the carrier circuit based on the time series hardware Trojan horse before and after the Trojan horse is activated. On this basis, the validity of PCA algorithm for detecting sequential hardware Trojan horse is verified. The experimental results show that, based on the hardware Trojan detection platform designed in this paper, PCA algorithm can effectively detect the hardware Trojan circuit which accounts for more than 4% of the total circuit area.
【學(xué)位授予單位】：天津大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2014
【分類號】：TP393.08

【參考文獻】

相關(guān)期刊論文 前6條

1 何國輝;甘俊英;;PCA類內(nèi)平均臉法在人臉識別中的應(yīng)用研究[J];計算機應(yīng)用研究;2006年03期

2 任立儒;;新情況下的特殊武器——硬件木馬[J];中國電子科學(xué)研究院學(xué)報;2011年02期

3 劉華鋒;羅宏偉;王力緯;;硬件木馬綜述[J];微電子學(xué);2011年05期

4 劉長龍;趙毅強;史亞峰;馮紫竹;;基于側(cè)信道分析的硬件木馬建模與優(yōu)化[J];華中科技大學(xué)學(xué)報(自然科學(xué)版);2013年02期

5 張鵬;王新成;周慶;;基于投影尋蹤分析的芯片硬件木馬檢測[J];通信學(xué)報;2013年04期

6 趙崇征;鄧高明;趙強;;基于旁路分析的集成電路芯片硬件木馬檢測[J];微電子學(xué)與計算機;2011年11期

本文編號：2319740