發(fā)布時(shí)間：2018-10-29 12:27

【摘要】：針對(duì)傳統(tǒng)數(shù)據(jù)采集傳輸系統(tǒng)普遍存在的傳輸速率低、硬件無法升級(jí)、實(shí)時(shí)性和通用性不足等問題,文中提出了一種基于FPGA的以太網(wǎng)高速數(shù)據(jù)傳輸方案。該方案采用集成在FPGA內(nèi)部的Nios II作為控制單元,通過移植操作系統(tǒng)和精簡TCP/IP協(xié)議棧并編寫上層應(yīng)用程序,控制外部千兆以太網(wǎng)PHY芯片實(shí)現(xiàn)了數(shù)據(jù)的高速傳輸。通過在搭建的實(shí)驗(yàn)平臺(tái)上進(jìn)行多串口數(shù)據(jù)采集傳輸測(cè)試,驗(yàn)證了該系統(tǒng)運(yùn)行穩(wěn)定、傳輸速率高、誤碼率低,同時(shí),該系統(tǒng)也具備了可編程、可裁剪和易擴(kuò)展的優(yōu)點(diǎn)。
[Abstract]:Aiming at the problems such as low transmission rate, inability to upgrade hardware, lack of real-time and generality in traditional data acquisition and transmission system, a high-speed data transmission scheme based on FPGA Ethernet is proposed in this paper. The Nios II integrated in FPGA is used as the control unit in this scheme. By transplanting the operating system, reducing the TCP/IP protocol stack and writing the upper application program, the external gigabit Ethernet PHY chip is controlled to transmit data at high speed. It is proved that the system has the advantages of stable operation, high transmission rate and low bit error rate. At the same time, the system also has the advantages of programmable, clippable and extensible.
【作者單位】： 蘭州理工大學(xué)電氣工程與信息工程學(xué)院;甘肅省工業(yè)過程先進(jìn)控制重點(diǎn)實(shí)驗(yàn)室;
【分類號(hào)】：TP393.11

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