本文選題：分組傳送網　切入點：FPGA　出處：《武漢理工大學》2014年碩士論文　論文類型：學位論文

【摘要】：近幾年來，通信業(yè)務中的數據IP化業(yè)務呈現爆發(fā)性增長，所占比重越來越大，同時傳統(tǒng)的語音業(yè)務也在保持平穩(wěn)增長。業(yè)務接口也從傳統(tǒng)的E1/STM-1等接口發(fā)展為FE、GE和光纖等高速接口。因此，有必要建立一個可以承載多業(yè)務的高效的網絡，既可以傳輸傳統(tǒng)的語音業(yè)務，又可以承載大量的多種業(yè)務。傳統(tǒng)的基于電路交換的同步數字體系SDH由于其剛性管道的特點，不能很好地滿足IP業(yè)務的突發(fā)性等特征。在這一背景下，PTN分組傳送網應運而生。 本文的研究工作和主要成果概述如下： （1）在PTN整體設計中，本文針對FPGA豐富的IP核資源等特性，說明了PTN設備中運用FPGA實現OAM功能的可行性。同時，闡述了小型PTN設備的功能特性以及各板卡的設計，通過各板卡和芯片之間的聯系，說明了PTN設備的工作原理。 （2）在FPGA的邏輯設計之前，本文研究了以太網幀傳輸特性以及PTN設備中OAM的相關協(xié)議，包括G.8113協(xié)議及Y.1731協(xié)議，并對其進行了詳細的分析和總結。 （3）在FPGA的邏輯設計中，針對PTN設備中OAM的傳輸特性、功能要求以及不同的資源緊缺情況，設計了LOCALBUS總線模塊、SPI總線模塊、OAMMII收發(fā)幀處理模塊、OAM SGMII收發(fā)幀處理模塊、OAM接收和發(fā)送模塊。分別對每個模塊使用Modelsim進行了仿真驗證并對其做了詳細說明，，最后進行了板級測試以驗證其正確性。 本文在FPGA設計中使用了SerDes高速串并轉換技術、FSM以及IP核等，解決了接收數據流的同時實時地對OAM幀進行判斷和處理的難題。同時，提出了使用FPGA完成OAM功能，替代了以往的軟件處理，提高了報文處理速率。
[Abstract]:In recent years, the data IP services in the communication services have shown explosive growth, accounting for an increasingly large proportion. At the same time, the traditional voice service is also growing steadily. The service interface has also developed from the traditional E1 / STM-1 interface to high-speed interfaces such as FEGE-fiber and so on. Therefore, it is necessary to establish an efficient network capable of carrying multiple services. The traditional synchronous digital system (SDH) based on circuit switching can transmit both traditional voice services and a large number of services. In this context, the PTN packet transport network emerges as the times require. The research work and main results of this paper are summarized as follows:. 1) in the whole design of PTN, this paper explains the feasibility of using FPGA to realize the function of OAM in PTN equipment according to the rich IP core resources of FPGA. At the same time, it expounds the functional characteristics of small PTN equipment and the design of each board card. The working principle of PTN equipment is explained by the relationship between the boards and chips. Before the logical design of FPGA, this paper studies the characteristics of Ethernet frame transmission and the related protocols of OAM in PTN devices, including G.8113 and Y.1731, and analyzes and summarizes them in detail. In the logic design of FPGA, aiming at the transmission characteristic, function requirement and different resource shortage of OAM in PTN equipment, The LOCALBUS bus module is designed. The LOCALBUS SGMII transceiver frame processing module is designed. Each module is simulated by Modelsim and explained in detail. Finally, a board level test is carried out to verify its correctness. In this paper, SerDes high-speed series-parallel conversion technology and IP core are used in FPGA design to solve the problem of real-time judging and processing OAM frame while receiving data stream. At the same time, the use of FPGA to complete OAM function is proposed. It replaces the previous software processing and improves the packet processing speed.
【學位授予單位】：武漢理工大學
【學位級別】：碩士
【學位授予年份】：2014
【分類號】：TP393.07

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